From dc6cb5d7751db66726c0786a562cea21a3d4e1c3 Mon Sep 17 00:00:00 2001
From: Koen Kooi <koen.kooi@linaro.org>
Date: Tue, 15 Oct 2013 14:51:49 +0200
Subject: [PATCH 2/2] openssl 1.0.1e: add ARMv7 AES optimizations

These are all backports from the openssl master branch.

Build tested on armv7a/angstrom and armv8/distroless

Signed-off-by: Koen Kooi <koen.kooi@linaro.org>
---
 ...ced-AES-for-ARM-NEON.-This-initial-versio.patch | 1010 ++++++++++++++++++++
 ...2-bsaes-armv7.pl-change-preferred-contact.patch |   27 +
 ...-armv7.pl-optmize-Sbox-and-key-conversion.patch |  167 ++++
 ....pl-minor-performance-squeeze-on-Snapdrag.patch |  264 +++++
 .../0005-bsaes-armv7.pl-even-closer-shave.patch    |  103 ++
 ....pl-closest-shave.-While-0.3-cpb-improvem.patch |   85 ++
 ...07-bsaes-armv7.pl-take-it-into-build-loop.patch |   76 ++
 ....pl-add-bsaes_cbc_encrypt-and-bsaes_ctr32.patch |  517 ++++++++++
 ...rt-for-ARM-NEON-based-bit-sliced-AES-in-X.patch |  774 +++++++++++++++
 ....pl-remove-byte-order-dependency-and-mino.patch |  763 +++++++++++++++
 ....pl-remove-partial-register-operations-in.patch |   60 ++
 ...asm-bsaes-.pl-improve-decrypt-performance.patch |  247 +++++
 .../recipes-connectivity/openssl/openssl_1.0.1e.bb |   12 +
 13 files changed, 4105 insertions(+)
 create mode 100644 meta/recipes-connectivity/openssl/openssl-1.0.1e/0001-Add-bit-sliced-AES-for-ARM-NEON.-This-initial-versio.patch
 create mode 100644 meta/recipes-connectivity/openssl/openssl-1.0.1e/0002-bsaes-armv7.pl-change-preferred-contact.patch
 create mode 100644 meta/recipes-connectivity/openssl/openssl-1.0.1e/0003-bsaes-armv7.pl-optmize-Sbox-and-key-conversion.patch
 create mode 100644 meta/recipes-connectivity/openssl/openssl-1.0.1e/0004-bsaes-armv7.pl-minor-performance-squeeze-on-Snapdrag.patch
 create mode 100644 meta/recipes-connectivity/openssl/openssl-1.0.1e/0005-bsaes-armv7.pl-even-closer-shave.patch
 create mode 100644 meta/recipes-connectivity/openssl/openssl-1.0.1e/0006-bsaes-armv7.pl-closest-shave.-While-0.3-cpb-improvem.patch
 create mode 100644 meta/recipes-connectivity/openssl/openssl-1.0.1e/0007-bsaes-armv7.pl-take-it-into-build-loop.patch
 create mode 100644 meta/recipes-connectivity/openssl/openssl-1.0.1e/0008-bsaes-armv7.pl-add-bsaes_cbc_encrypt-and-bsaes_ctr32.patch
 create mode 100644 meta/recipes-connectivity/openssl/openssl-1.0.1e/0009-Added-support-for-ARM-NEON-based-bit-sliced-AES-in-X.patch
 create mode 100644 meta/recipes-connectivity/openssl/openssl-1.0.1e/0010-bsaes-armv7.pl-remove-byte-order-dependency-and-mino.patch
 create mode 100644 meta/recipes-connectivity/openssl/openssl-1.0.1e/0011-bsaes-armv7.pl-remove-partial-register-operations-in.patch
 create mode 100644 meta/recipes-connectivity/openssl/openssl-1.0.1e/0015-aes-asm-bsaes-.pl-improve-decrypt-performance.patch

diff --git a/meta/recipes-connectivity/openssl/openssl-1.0.1e/0001-Add-bit-sliced-AES-for-ARM-NEON.-This-initial-versio.patch b/meta/recipes-connectivity/openssl/openssl-1.0.1e/0001-Add-bit-sliced-AES-for-ARM-NEON.-This-initial-versio.patch
new file mode 100644
index 0000000..0e4fcb7
--- /dev/null
+++ b/meta/recipes-connectivity/openssl/openssl-1.0.1e/0001-Add-bit-sliced-AES-for-ARM-NEON.-This-initial-versio.patch
@@ -0,0 +1,1010 @@
+From cae228836c1539585e960ef3ed687c0aaf12be34 Mon Sep 17 00:00:00 2001
+From: Andy Polyakov <appro@openssl.org>
+Date: Sat, 3 Mar 2012 12:33:28 +0000
+Subject: [PATCH 01/15] Add bit-sliced AES for ARM NEON. This initial version
+ is effectively reference implementation, it does not interface to OpenSSL
+ yet.
+
+Upstream-Status: Backport
+
+---
+ crypto/aes/asm/bsaes-armv7.pl | 987 ++++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 987 insertions(+)
+ create mode 100644 crypto/aes/asm/bsaes-armv7.pl
+
+diff --git a/crypto/aes/asm/bsaes-armv7.pl b/crypto/aes/asm/bsaes-armv7.pl
+new file mode 100644
+index 0000000..a93c8ed
+--- /dev/null
++++ b/crypto/aes/asm/bsaes-armv7.pl
+@@ -0,0 +1,987 @@
++#!/usr/bin/env perl
++
++# ====================================================================
++# Written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
++# project. The module is, however, dual licensed under OpenSSL and
++# CRYPTOGAMS licenses depending on where you obtain it. For further
++# details see http://www.openssl.org/~appro/cryptogams/.
++# ====================================================================
++
++# Bit-sliced AES for ARM NEON
++#
++# February 2012.
++#
++# This implementation is direct adaptation of bsaes-x86_64 module for
++# ARM NEON. Except that this module is endian-neutral [in sense that
++# it can be compiled for either endianness] by courtesy of vld1.8's
++# neutrality. Initial version doesn't implement interface to OpenSSL,
++# only low-level primitives and unsupported entry points, just enough
++# to collect performance results, which for Cortex-A8 core are:
++#
++# encrypt	20.9 cycles per byte processed with 128-bit key
++# decrypt	25.6 cycles per byte processed with 128-bit key
++# key conv.	900  cycles per 128-bit key/0.34 of 8x block
++#
++# When comparing to x86_64 results keep in mind that NEON unit is
++# [mostly] single-issue and thus can't benefit from parallelism. And
++# when comparing to aes-armv4 results keep in mind key schedule
++# conversion overhead (see bsaes-x86_64.pl for details)...
++#
++#						<appro@openssl.org>
++
++while (($output=shift) && ($output!~/^\w[\w\-]*\.\w+$/)) {}
++open STDOUT,">$output";
++
++my ($inp,$out,$len,$key)=("r0","r1","r2","r3");
++my @XMM=map("q$_",(0..15));
++
++{
++my ($key,$rounds,$const)=("r4","r5","r6");
++
++sub Dlo()   { shift=~m|q([1]?[0-9])|?"d".($1*2):"";     }
++sub Dhi()   { shift=~m|q([1]?[0-9])|?"d".($1*2+1):"";   }
++
++sub Sbox {
++# input in  lsb > [b0, b1, b2, b3, b4, b5, b6, b7] < msb
++# output in lsb > [b0, b1, b4, b6, b3, b7, b2, b5] < msb
++my @b=@_[0..7];
++my @t=@_[8..11];
++my @s=@_[12..15];
++	&InBasisChange	(@b);
++	&Inv_GF256	(@b[6,5,0,3,7,1,4,2],@t,@s);
++	&OutBasisChange	(@b[7,1,4,2,6,5,0,3]);
++}
++
++sub InBasisChange {
++# input in  lsb > [b0, b1, b2, b3, b4, b5, b6, b7] < msb
++# output in lsb > [b6, b5, b0, b3, b7, b1, b4, b2] < msb 
++my @b=@_[0..7];
++$code.=<<___;
++	veor	@b[5], @b[5], @b[6]
++	veor	@b[2], @b[2], @b[1]
++	veor	@b[3], @b[3], @b[0]
++	veor	@b[6], @b[6], @b[2]
++	veor	@b[5], @b[5], @b[0]
++
++	veor	@b[6], @b[6], @b[3]
++	veor	@b[3], @b[3], @b[7]
++	veor	@b[7], @b[7], @b[5]
++	veor	@b[3], @b[3], @b[4]
++	veor	@b[4], @b[4], @b[5]
++	veor	@b[3], @b[3], @b[1]
++
++	veor	@b[2], @b[2], @b[7]
++	veor	@b[1], @b[1], @b[5]
++___
++}
++
++sub OutBasisChange {
++# input in  lsb > [b0, b1, b2, b3, b4, b5, b6, b7] < msb
++# output in lsb > [b6, b1, b2, b4, b7, b0, b3, b5] < msb
++my @b=@_[0..7];
++$code.=<<___;
++	veor	@b[0], @b[0], @b[6]
++	veor	@b[1], @b[1], @b[4]
++	veor	@b[2], @b[2], @b[0]
++	veor	@b[4], @b[4], @b[6]
++	veor	@b[6], @b[6], @b[1]
++
++	veor	@b[1], @b[1], @b[5]
++	veor	@b[5], @b[5], @b[3]
++	veor	@b[3], @b[3], @b[7]
++	veor	@b[7], @b[7], @b[5]
++	veor	@b[2], @b[2], @b[5]
++
++	veor	@b[4], @b[4], @b[7]
++___
++}
++
++sub InvSbox {
++# input in lsb 	> [b0, b1, b2, b3, b4, b5, b6, b7] < msb
++# output in lsb	> [b0, b1, b6, b4, b2, b7, b3, b5] < msb
++my @b=@_[0..7];
++my @t=@_[8..11];
++my @s=@_[12..15];
++	&InvInBasisChange	(@b);
++	&Inv_GF256		(@b[5,1,2,6,3,7,0,4],@t,@s);
++	&InvOutBasisChange	(@b[3,7,0,4,5,1,2,6]);
++}
++
++sub InvInBasisChange {		# OutBasisChange in reverse
++my @b=@_[5,1,2,6,3,7,0,4];
++$code.=<<___
++	veor	@b[4], @b[4], @b[7]
++
++	veor	@b[7], @b[7], @b[5]
++	veor	@b[2], @b[2], @b[5]
++	veor	@b[3], @b[3], @b[7]
++	veor	@b[5], @b[5], @b[3]
++	veor	@b[1], @b[1], @b[5]
++
++	veor	@b[6], @b[6], @b[1]
++	veor	@b[2], @b[2], @b[0]
++	veor	@b[4], @b[4], @b[6]
++	veor	@b[0], @b[0], @b[6]
++	veor	@b[1], @b[1], @b[4]
++___
++}
++
++sub InvOutBasisChange {		# InBasisChange in reverse
++my @b=@_[2,5,7,3,6,1,0,4];
++$code.=<<___;
++	veor	@b[1], @b[1], @b[5]
++	veor	@b[2], @b[2], @b[7]
++
++	veor	@b[3], @b[3], @b[1]
++	veor	@b[4], @b[4], @b[5]
++	veor	@b[7], @b[7], @b[5]
++	veor	@b[3], @b[3], @b[4]
++	 veor 	@b[5], @b[5], @b[0]
++	veor	@b[3], @b[3], @b[7]
++	 veor	@b[6], @b[6], @b[2]
++	 veor	@b[2], @b[2], @b[1]
++	veor	@b[6], @b[6], @b[3]
++
++	veor	@b[3], @b[3], @b[0]
++	veor	@b[5], @b[5], @b[6]
++___
++}
++
++sub Mul_GF4 {
++#;*************************************************************
++#;* Mul_GF4: Input x0-x1,y0-y1 Output x0-x1 Temp t0 (8) *
++#;*************************************************************
++my ($x0,$x1,$y0,$y1,$t0)=@_;
++$code.=<<___;
++	veor 	$t0, $y0, $y1
++	vand	$t0, $t0, $x0
++	veor	$x0, $x0, $x1
++	vand	$x1, $x1, $y0
++	vand	$x0, $x0, $y1
++	veor	$x0, $x0, $x1
++	veor	$x1, $x1, $t0
++___
++}
++
++sub Mul_GF4_N {				# not used, see next subroutine
++# multiply and scale by N
++my ($x0,$x1,$y0,$y1,$t0)=@_;
++$code.=<<___;
++	veor	$t0, $y0, $y1
++	vand	$t0, $t0, $x0
++	veor	$x0, $x0, $x1
++	vand	$x1, $x1, $y0
++	vand	$x0, $x0, $y1
++	veor	$x1, $x1, $x0
++	veor	$x0, $x0, $t0
++___
++}
++
++sub Mul_GF4_N_GF4 {
++# interleaved Mul_GF4_N and Mul_GF4
++my ($x0,$x1,$y0,$y1,$t0,
++    $x2,$x3,$y2,$y3,$t1)=@_;
++$code.=<<___;
++	veor	$t0, $y0, $y1
++	 veor 	$t1, $y2, $y3
++	vand	$t0, $t0, $x0
++	 vand	$t1, $t1, $x2
++	veor	$x0, $x0, $x1
++	 veor	$x2, $x2, $x3
++	vand	$x1, $x1, $y0
++	 vand	$x3, $x3, $y2
++	vand	$x0, $x0, $y1
++	 vand	$x2, $x2, $y3
++	veor	$x1, $x1, $x0
++	 veor	$x2, $x2, $x3
++	veor	$x0, $x0, $t0
++	 veor	$x3, $x3, $t1
++___
++}
++sub Mul_GF16_2 {
++my @x=@_[0..7];
++my @y=@_[8..11];
++my @t=@_[12..15];
++$code.=<<___;
++	vmov	@t[0], @x[0]
++	vmov	@t[1], @x[1]
++___
++	&Mul_GF4  	(@x[0], @x[1], @y[0], @y[1], @t[2]);
++$code.=<<___;
++	veor	@t[0], @t[0], @x[2]
++	veor	@t[1], @t[1], @x[3]
++	veor	@y[0], @y[0], @y[2]
++	veor	@y[1], @y[1], @y[3]
++___
++	Mul_GF4_N_GF4	(@t[0], @t[1], @y[0], @y[1], @t[3],
++			 @x[2], @x[3], @y[2], @y[3], @t[2]);
++$code.=<<___;
++	veor	@x[0], @x[0], @t[0]
++	veor	@x[2], @x[2], @t[0]
++	veor	@x[1], @x[1], @t[1]
++	veor	@x[3], @x[3], @t[1]
++
++	veor	@t[0], @x[4], @x[6]
++	veor	@t[1], @x[5], @x[7]
++___
++	&Mul_GF4_N_GF4	(@t[0], @t[1], @y[0], @y[1], @t[3],
++			 @x[6], @x[7], @y[2], @y[3], @t[2]);
++$code.=<<___;
++	veor	@y[0], @y[0], @y[2]
++	veor	@y[1], @y[1], @y[3]
++___
++	&Mul_GF4  	(@x[4], @x[5], @y[0], @y[1], @t[3]);
++$code.=<<___;
++	veor	@x[4], @x[4], @t[0]
++	veor	@x[6], @x[6], @t[0]
++	veor	@x[5], @x[5], @t[1]
++	veor	@x[7], @x[7], @t[1]
++___
++}
++sub Inv_GF256 {
++#;********************************************************************
++#;* Inv_GF256: Input x0-x7 Output x0-x7 Temp t0-t3,s0-s3 (144)       *
++#;********************************************************************
++my @x=@_[0..7];
++my @t=@_[8..11];
++my @s=@_[12..15];
++# direct optimizations from hardware
++$code.=<<___;
++	veor	@t[3], @x[4], @x[6]
++	veor	@t[2], @x[5], @x[7]
++	veor	@t[1], @x[1], @x[3]
++	veor	@s[1], @x[7], @x[6]
++	 vmov	@t[0], @t[2]
++	veor	@s[0], @x[0], @x[2]
++
++	vorr	@t[2], @t[2], @t[1]
++	veor	@s[3], @t[3], @t[0]
++	vand	@s[2], @t[3], @s[0]
++	vorr	@t[3], @t[3], @s[0]
++	veor	@s[0], @s[0], @t[1]
++	vand	@t[0], @t[0], @t[1]
++	vand	@s[3], @s[3], @s[0]
++	veor	@s[0], @x[3], @x[2]
++	vand	@s[1], @s[1], @s[0]
++	veor	@t[3], @t[3], @s[1]
++	veor	@t[2], @t[2], @s[1]
++	veor	@s[1], @x[4], @x[5]
++	veor	@s[0], @x[1], @x[0]
++	vorr	@t[1], @s[1], @s[0]
++	vand	@s[1], @s[1], @s[0]
++	veor	@t[0], @t[0], @s[1]
++	veor	@t[3], @t[3], @s[3]
++	veor	@t[2], @t[2], @s[2]
++	veor	@t[1], @t[1], @s[3]
++	veor	@t[0], @t[0], @s[2]
++	veor	@t[1], @t[1], @s[2]
++	vand	@s[0], @x[7], @x[3]
++	vand	@s[1], @x[6], @x[2]
++	vand	@s[2], @x[5], @x[1]
++	vorr	@s[3], @x[4], @x[0]
++	veor	@t[3], @t[3], @s[0]
++	veor	@t[2], @t[2], @s[1]
++	veor	@t[1], @t[1], @s[2]
++	veor	@t[0], @t[0], @s[3]
++
++	@ Inv_GF16 \t0, \t1, \t2, \t3, \s0, \s1, \s2, \s3
++
++	@ new smaller inversion
++
++	veor	@s[0], @t[3], @t[2]
++	vand	@t[3], @t[3], @t[1]
++
++	veor	@s[2], @t[0], @t[3]
++	vand	@s[3], @s[0], @s[2]
++
++	veor	@s[3], @s[3], @t[2]
++	veor	@s[1], @t[1], @t[0]
++
++	veor	@t[3], @t[3], @t[2]
++
++	vand	@s[1], @s[1], @t[3]
++
++	veor	@s[1], @s[1], @t[0]
++
++	veor	@t[2], @s[2], @s[1]
++	veor	@t[1], @t[1], @s[1]
++
++	vand	@t[2], @t[2], @t[0]
++
++	veor	@s[2], @s[2], @t[2]
++	veor	@t[1], @t[1], @t[2]
++
++	vand	@s[2], @s[2], @s[3]
++
++	veor	@s[2], @s[2], @s[0]
++___
++# output in s3, s2, s1, t1
++
++# Mul_GF16_2 \x0, \x1, \x2, \x3, \x4, \x5, \x6, \x7, \t2, \t3, \t0, \t1, \s0, \s1, \s2, \s3
++
++# Mul_GF16_2 \x0, \x1, \x2, \x3, \x4, \x5, \x6, \x7, \s3, \s2, \s1, \t1, \s0, \t0, \t2, \t3
++	&Mul_GF16_2(@x,@s[3,2,1],@t[1],@s[0],@t[0,2,3]);
++
++### output msb > [x3,x2,x1,x0,x7,x6,x5,x4] < lsb
++}
++
++# AES linear components
++
++sub ShiftRows {
++my @x=@_[0..7];
++my @t=@_[8..11];
++my $mask=pop;
++$code.=<<___;
++	vldmia	$key!, {@t[0]-@t[3]}
++	veor	@t[0], @t[0], @x[0]
++	veor	@t[1], @t[1], @x[1]
++	vtbl.8	`&Dlo(@x[0])`, {@t[0]}, `&Dlo($mask)`
++	vtbl.8	`&Dhi(@x[0])`, {@t[0]}, `&Dhi($mask)`
++	vldmia	$key!, {@t[0]}
++	veor	@t[2], @t[2], @x[2]
++	vtbl.8	`&Dlo(@x[1])`, {@t[1]}, `&Dlo($mask)`
++	vtbl.8	`&Dhi(@x[1])`, {@t[1]}, `&Dhi($mask)`
++	vldmia	$key!, {@t[1]}
++	veor	@t[3], @t[3], @x[3]
++	vtbl.8	`&Dlo(@x[2])`, {@t[2]}, `&Dlo($mask)`
++	vtbl.8	`&Dhi(@x[2])`, {@t[2]}, `&Dhi($mask)`
++	vldmia	$key!, {@t[2]}
++	vtbl.8	`&Dlo(@x[3])`, {@t[3]}, `&Dlo($mask)`
++	vtbl.8	`&Dhi(@x[3])`, {@t[3]}, `&Dhi($mask)`
++	vldmia	$key!, {@t[3]}
++	veor	@t[0], @t[0], @x[4]
++	veor	@t[1], @t[1], @x[5]
++	vtbl.8	`&Dlo(@x[4])`, {@t[0]}, `&Dlo($mask)`
++	vtbl.8	`&Dhi(@x[4])`, {@t[0]}, `&Dhi($mask)`
++	veor	@t[2], @t[2], @x[6]
++	vtbl.8	`&Dlo(@x[5])`, {@t[1]}, `&Dlo($mask)`
++	vtbl.8	`&Dhi(@x[5])`, {@t[1]}, `&Dhi($mask)`
++	veor	@t[3], @t[3], @x[7]
++	vtbl.8	`&Dlo(@x[6])`, {@t[2]}, `&Dlo($mask)`
++	vtbl.8	`&Dhi(@x[6])`, {@t[2]}, `&Dhi($mask)`
++	vtbl.8	`&Dlo(@x[7])`, {@t[3]}, `&Dlo($mask)`
++	vtbl.8	`&Dhi(@x[7])`, {@t[3]}, `&Dhi($mask)`
++___
++}
++
++sub MixColumns {
++# modified to emit output in order suitable for feeding back to aesenc[last]
++my @x=@_[0..7];
++my @t=@_[8..15];
++$code.=<<___;
++	vext.8	@t[0], @x[0], @x[0], #12	@ x0 <<< 32
++	vext.8	@t[1], @x[1], @x[1], #12
++	 veor	@x[0], @x[0], @t[0]		@ x0 ^ (x0 <<< 32)
++	vext.8	@t[2], @x[2], @x[2], #12
++	 veor	@x[1], @x[1], @t[1]
++	vext.8	@t[3], @x[3], @x[3], #12
++	 veor	@x[2], @x[2], @t[2]
++	vext.8	@t[4], @x[4], @x[4], #12
++	 veor	@x[3], @x[3], @t[3]
++	vext.8	@t[5], @x[5], @x[5], #12
++	 veor	@x[4], @x[4], @t[4]
++	vext.8	@t[6], @x[6], @x[6], #12
++	 veor	@x[5], @x[5], @t[5]
++	vext.8	@t[7], @x[7], @x[7], #12
++	 veor	@x[6], @x[6], @t[6]
++	 veor	@x[7], @x[7], @t[7]
++
++	veor	@t[1], @t[1], @x[0]
++	 vext.8	@x[0], @x[0], @x[0], #8		@ (x0 ^ (x0 <<< 32)) <<< 64)
++	veor	@t[0], @t[0], @x[7]
++	veor	@t[1], @t[1], @x[7]
++	veor	@t[2], @t[2], @x[1]
++	 vext.8	@x[1], @x[1], @x[1], #8
++	veor	@t[5], @t[5], @x[4]
++	 veor	@x[0], @x[0], @t[0]
++	veor	@t[6], @t[6], @x[5]
++	 veor	@x[1], @x[1], @t[1]
++	 vext.8	@t[0], @x[4], @x[4], #8
++	veor	@t[4], @t[4], @x[3]
++	 vext.8	@t[1], @x[5], @x[5], #8
++	veor	@t[7], @t[7], @x[6]
++	 vext.8	@x[4], @x[3], @x[3], #8
++	veor	@t[3], @t[3], @x[2]
++	 vext.8	@x[5], @x[7], @x[7], #8
++	veor	@t[3], @t[3], @x[7]
++	 vext.8	@x[3], @x[6], @x[6], #8
++	veor	@t[4], @t[4], @x[7]
++	 vext.8	@x[6], @x[2], @x[2], #8
++	veor	@x[2], @t[0], @t[4]
++	veor	@x[7], @t[1], @t[5]
++
++	veor	@x[4], @x[4], @t[3]
++	veor	@x[5], @x[5], @t[7]
++	veor	@x[3], @x[3], @t[6]
++	 @ vmov	@x[2], @t[0]
++	veor	@x[6], @x[6], @t[2]
++	 @ vmov	@x[7], @t[1]
++___
++}
++
++sub InvMixColumns {
++my @x=@_[0..7];
++my @t=@_[8..15];
++
++$code.=<<___;
++	@ multiplication by 0x0e
++	vext.8	@t[7], @x[7], @x[7], #12
++	vmov	@t[2], @x[2]
++	veor	@x[7], @x[7], @x[5]		@ 7 5
++	veor	@x[2], @x[2], @x[5]		@ 2 5
++	vext.8	@t[0], @x[0], @x[0], #12
++	vmov	@t[5], @x[5]
++	veor	@x[5], @x[5], @x[0]		@ 5 0		[1]
++	veor	@x[0], @x[0], @x[1]		@ 0 1
++	vext.8	@t[1], @x[1], @x[1], #12
++	veor	@x[1], @x[1], @x[2]		@ 1 25
++	veor	@x[0], @x[0], @x[6]		@ 01 6		[2]
++	veor	@x[1], @x[1], @x[3]		@ 125 3		[4]
++	vext.8	@t[3], @x[3], @x[3], #12
++	veor	@x[2], @x[2], @x[0]		@ 25 016	[3]
++	veor	@x[3], @x[3], @x[7]		@ 3 75
++	veor	@x[7], @x[7], @x[6]		@ 75 6		[0]
++	vext.8	@t[6], @x[6], @x[6], #12
++	vmov	@t[4], @x[4]
++	veor	@x[6], @x[6], @x[4]		@ 6 4
++	veor	@x[4], @x[4], @x[3]		@ 4 375		[6]
++	veor	@x[3], @x[3], @x[7]		@ 375 756=36
++	veor	@x[6], @x[6], @t[5]		@ 64 5		[7]
++	veor	@x[3], @x[3], @t[2]		@ 36 2
++	vext.8	@t[5], @t[5], @t[5], #12
++	veor	@x[3], @x[3], @t[4]		@ 362 4		[5]
++___
++					my @y = @x[7,5,0,2,1,3,4,6];
++$code.=<<___;
++	@ multiplication by 0x0b
++	veor	@y[1], @y[1], @y[0]
++	veor	@y[0], @y[0], @t[0]
++	veor	@y[1], @y[1], @t[1]
++	vext.8	@t[2], @t[2], @t[2], #12
++	veor	@y[0], @y[0], @t[5]
++	veor	@y[1], @y[1], @t[6]
++	veor	@y[0], @y[0], @t[7]
++	vext.8	@t[4], @t[4], @t[4], #12
++	veor	@t[7], @t[7], @t[6]		@ clobber t[7]
++	veor	@y[1], @y[1], @y[0]
++
++	veor	@y[3], @y[3], @t[0]
++	vext.8	@t[0], @t[0], @t[0], #12
++	veor	@y[2], @y[2], @t[1]
++	veor	@y[4], @y[4], @t[1]
++	veor	@y[2], @y[2], @t[2]
++	vext.8	@t[1], @t[1], @t[1], #12
++	veor	@y[3], @y[3], @t[2]
++	veor	@y[5], @y[5], @t[2]
++	veor	@y[2], @y[2], @t[7]
++	vext.8	@t[2], @t[2], @t[2], #12
++	veor	@y[3], @y[3], @t[3]
++	veor	@y[6], @y[6], @t[3]
++	veor	@y[4], @y[4], @t[3]
++	vext.8	@t[3], @t[3], @t[3], #12
++	veor	@y[7], @y[7], @t[4]
++	veor	@y[5], @y[5], @t[4]
++	veor	@y[7], @y[7], @t[7]
++	veor	@y[3], @y[3], @t[5]
++	veor	@y[4], @y[4], @t[4]
++	veor	@t[7], @t[7], @t[5]		@ clobber t[7] even more
++
++	veor	@y[5], @y[5], @t[7]
++	vext.8	@t[4], @t[4], @t[4], #12
++	veor	@y[6], @y[6], @t[7]
++	veor	@y[4], @y[4], @t[7]
++
++	veor	@t[7], @t[7], @t[5]
++	vext.8	@t[5], @t[5], @t[5], #12
++	veor	@t[7], @t[7], @t[6]		@ restore t[7]
++
++	@ multiplication by 0x0d
++	veor	@y[4], @y[4], @y[7]
++	veor	@y[7], @y[7], @t[4]
++	vext.8	@t[6], @t[6], @t[6], #12
++	veor	@y[2], @y[2], @t[0]
++	veor	@y[7], @y[7], @t[5]
++	veor	@y[2], @y[2], @t[2]
++	vext.8	@t[7], @t[7], @t[7], #12
++
++	veor	@y[3], @y[3], @y[1]
++	veor	@y[1], @y[1], @t[1]
++	veor	@y[0], @y[0], @t[0]
++	veor	@y[3], @y[3], @t[0]
++	veor	@y[1], @y[1], @t[5]
++	veor	@y[0], @y[0], @t[5]
++	veor	@y[1], @y[1], @t[7]
++	vext.8	@t[0], @t[0], @t[0], #12
++	veor	@y[0], @y[0], @t[6]
++	veor	@y[3], @y[3], @y[1]
++	veor	@y[4], @y[4], @t[1]
++	vext.8	@t[1], @t[1], @t[1], #12
++
++	veor	@y[7], @y[7], @t[7]
++	veor	@y[4], @y[4], @t[2]
++	veor	@y[5], @y[5], @t[2]
++	vext.8	@t[2], @t[2], @t[2], #12
++	veor	@y[2], @y[2], @t[6]
++	veor	@t[6], @t[6], @t[3]		@ clobber t[6]
++	veor	@y[4], @y[4], @y[7]
++	veor	@y[3], @y[3], @t[6]
++
++	veor	@y[6], @y[6], @t[6]
++	veor	@y[5], @y[5], @t[5]
++	vext.8	@t[5], @t[5], @t[5], #12
++	veor	@y[6], @y[6], @t[4]
++	vext.8	@t[4], @t[4], @t[4], #12
++	veor	@y[5], @y[5], @t[6]
++	veor	@y[6], @y[6], @t[7]
++	vext.8	@t[7], @t[7], @t[7], #12
++	veor	@t[6], @t[6], @t[3]		@ restore t[6]
++	vext.8	@t[3], @t[3], @t[3], #12
++
++	@ multiplication by 0x09
++	veor	@y[4], @y[4], @y[1]
++	veor	@t[1], @t[1], @y[1]		@ t[1]=y[1]
++	veor	@t[0], @t[0], @t[5]		@ clobber t[0]
++	vext.8	@t[6], @t[6], @t[6], #12
++	veor	@t[1], @t[1], @t[5]
++	veor	@y[3], @y[3], @t[0]
++	veor	@t[0], @t[0], @y[0]		@ t[0]=y[0]
++	veor	@t[1], @t[1], @t[6]
++	veor	@t[6], @t[6], @t[7]		@ clobber t[6]
++	veor	@y[4], @y[4], @t[1]
++	veor	@y[7], @y[7], @t[4]
++	veor	@t[4], @t[4], @y[4]		@ t[4]=y[4]
++	veor	@y[6], @y[6], @t[3]
++	veor	@t[3], @t[3], @y[3]		@ t[3]=y[3]
++	veor	@y[5], @y[5], @t[2]
++	veor	@t[2], @t[2], @y[2]		@ t[2]=y[2]
++	veor	@t[3], @t[3], @t[7]
++	veor	@t[5], @t[5], @y[5]		@ t[5]=y[5]
++	veor	@XMM[5], @t[5], @t[6]
++	veor	@XMM[6], @t[6], @y[6]		@ t[6]=y[6]
++	veor	@XMM[2], @t[2], @t[6]
++	veor	@XMM[7], @t[7], @y[7]		@ t[7]=y[7]
++
++	vmov	@XMM[0], @t[0]
++	vmov	@XMM[1], @t[1]
++	@ vmov	@XMM[2], @t[2]
++	vmov	@XMM[3], @t[3]
++	vmov	@XMM[4], @t[4]
++	@ vmov	@XMM[5], @t[5]
++	@ vmov	@XMM[6], @t[6]
++	@ vmov	@XMM[7], @t[7]
++___
++}
++
++sub swapmove {
++my ($a,$b,$n,$mask,$t)=@_;
++$code.=<<___;
++	vshr.u64	$t, $b, #$n
++	veor		$t, $t, $a
++	vand		$t, $t, $mask
++	veor		$a, $a, $t
++	vshl.u64	$t, $t, #$n
++	veor		$b, $b, $t
++___
++}
++sub swapmove2x {
++my ($a0,$b0,$a1,$b1,$n,$mask,$t0,$t1)=@_;
++$code.=<<___;
++	vshr.u64	$t0, $b0, #$n
++	 vshr.u64	$t1, $b1, #$n
++	veor		$t0, $t0, $a0
++	 veor		$t1, $t1, $a1
++	vand		$t0, $t0, $mask
++	 vand		$t1, $t1, $mask
++	veor		$a0, $a0, $t0
++	vshl.u64	$t0, $t0, #$n
++	 veor		$a1, $a1, $t1
++	 vshl.u64	$t1, $t1, #$n
++	veor		$b0, $b0, $t0
++	 veor		$b1, $b1, $t1
++___
++}
++
++sub bitslice {
++my @x=reverse(@_[0..7]);
++my ($t0,$t1,$t2,$t3)=@_[8..11];
++$code.=<<___;
++	vmov.i8	$t0,#0x55			@ compose .LBS0
++	vmov.i8	$t1,#0x33			@ compose .LBS1
++___
++	&swapmove2x(@x[0,1,2,3],1,$t0,$t2,$t3);
++	&swapmove2x(@x[4,5,6,7],1,$t0,$t2,$t3);
++$code.=<<___;
++	vmov.i8	$t0,#0x0f			@ compose .LBS2
++___
++	&swapmove2x(@x[0,2,1,3],2,$t1,$t2,$t3);
++	&swapmove2x(@x[4,6,5,7],2,$t1,$t2,$t3);
++
++	&swapmove2x(@x[0,4,1,5],4,$t0,$t2,$t3);
++	&swapmove2x(@x[2,6,3,7],4,$t0,$t2,$t3);
++}
++
++$code.=<<___;
++.text
++.code	32
++.fpu	neon
++
++.type	_bsaes_decrypt8,%function
++.align	4
++_bsaes_decrypt8:
++	sub	$const,pc,#8			@ _bsaes_decrypt8
++	vldmia	$key!, {@XMM[9]}		@ round 0 key
++	add	$const,$const,#.LM0ISR-_bsaes_decrypt8
++
++	vldmia	$const!, {@XMM[8]}		@ .LM0ISR
++	veor	@XMM[10], @XMM[0], @XMM[9]	@ xor with round0 key
++	veor	@XMM[11], @XMM[1], @XMM[9]
++	 vtbl.8	`&Dlo(@XMM[0])`, {@XMM[10]}, `&Dlo(@XMM[8])`
++	 vtbl.8	`&Dhi(@XMM[0])`, {@XMM[10]}, `&Dhi(@XMM[8])`
++	veor	@XMM[12], @XMM[2], @XMM[9]
++	 vtbl.8	`&Dlo(@XMM[1])`, {@XMM[11]}, `&Dlo(@XMM[8])`
++	 vtbl.8	`&Dhi(@XMM[1])`, {@XMM[11]}, `&Dhi(@XMM[8])`
++	veor	@XMM[13], @XMM[3], @XMM[9]
++	 vtbl.8	`&Dlo(@XMM[2])`, {@XMM[12]}, `&Dlo(@XMM[8])`
++	 vtbl.8	`&Dhi(@XMM[2])`, {@XMM[12]}, `&Dhi(@XMM[8])`
++	veor	@XMM[14], @XMM[4], @XMM[9]
++	 vtbl.8	`&Dlo(@XMM[3])`, {@XMM[13]}, `&Dlo(@XMM[8])`
++	 vtbl.8	`&Dhi(@XMM[3])`, {@XMM[13]}, `&Dhi(@XMM[8])`
++	veor	@XMM[15], @XMM[5], @XMM[9]
++	 vtbl.8	`&Dlo(@XMM[4])`, {@XMM[14]}, `&Dlo(@XMM[8])`
++	 vtbl.8	`&Dhi(@XMM[4])`, {@XMM[14]}, `&Dhi(@XMM[8])`
++	veor	@XMM[10], @XMM[6], @XMM[9]
++	 vtbl.8	`&Dlo(@XMM[5])`, {@XMM[15]}, `&Dlo(@XMM[8])`
++	 vtbl.8	`&Dhi(@XMM[5])`, {@XMM[15]}, `&Dhi(@XMM[8])`
++	veor	@XMM[11], @XMM[7], @XMM[9]
++	 vtbl.8	`&Dlo(@XMM[6])`, {@XMM[10]}, `&Dlo(@XMM[8])`
++	 vtbl.8	`&Dhi(@XMM[6])`, {@XMM[10]}, `&Dhi(@XMM[8])`
++	 vtbl.8	`&Dlo(@XMM[7])`, {@XMM[11]}, `&Dlo(@XMM[8])`
++	 vtbl.8	`&Dhi(@XMM[7])`, {@XMM[11]}, `&Dhi(@XMM[8])`
++___
++	&bitslice	(@XMM[0..7, 8..11]);
++$code.=<<___;
++	sub	$rounds,$rounds,#1
++	b	.Ldec_sbox
++.align	4
++.Ldec_loop:
++___
++	&ShiftRows	(@XMM[0..7, 8..12]);
++$code.=".Ldec_sbox:\n";
++	&InvSbox	(@XMM[0..7, 8..15]);
++$code.=<<___;
++	subs	$rounds,$rounds,#1
++	bcc	.Ldec_done
++___
++	&InvMixColumns	(@XMM[0,1,6,4,2,7,3,5, 8..15]);
++$code.=<<___;
++	vldmia	$const, {@XMM[12]}		@ .LISR
++	addeq	$const,$const,#0x10
++	bne	.Ldec_loop
++	vldmia	$const, {@XMM[12]}		@ .LISRM0
++	b	.Ldec_loop
++.align	4
++.Ldec_done:
++___
++	&bitslice	(@XMM[0,1,6,4,2,7,3,5, 8..11]);
++$code.=<<___;
++	vldmia	$key, {@XMM[8]}			@ last round key
++	veor	@XMM[6], @XMM[6], @XMM[8]
++	veor	@XMM[4], @XMM[4], @XMM[8]
++	veor	@XMM[2], @XMM[2], @XMM[8]
++	veor	@XMM[7], @XMM[7], @XMM[8]
++	veor	@XMM[3], @XMM[3], @XMM[8]
++	veor	@XMM[5], @XMM[5], @XMM[8]
++	veor	@XMM[0], @XMM[0], @XMM[8]
++	veor	@XMM[1], @XMM[1], @XMM[8]
++	bx	lr
++.size	_bsaes_decrypt8,.-_bsaes_decrypt8
++
++.type	_bsaes_const,%object
++.align	6
++_bsaes_const:
++.LM0ISR:	@ InvShiftRows constants
++	.quad	0x0a0e0206070b0f03, 0x0004080c0d010509
++.LISR:
++	.quad	0x0504070602010003, 0x0f0e0d0c080b0a09
++.LISRM0:
++	.quad	0x01040b0e0205080f, 0x0306090c00070a0d
++.LM0SR:		@ ShiftRows constants
++	.quad	0x0a0e02060f03070b, 0x0004080c05090d01
++.LSR:
++	.quad	0x0504070600030201, 0x0f0e0d0c0a09080b
++.LSRM0:
++	.quad	0x0304090e00050a0f, 0x01060b0c0207080d
++.LM0:
++	.quad	0x02060a0e03070b0f, 0x0004080c0105090d
++.asciz	"Bit-sliced AES for NEON, CRYPTOGAMS by <appro\@openssl.org>"
++.align	6
++.size	_bsaes_const,.-_bsaes_const
++
++.type	_bsaes_encrypt8,%function
++.align	4
++_bsaes_encrypt8:
++	sub	$const,pc,#8			@ _bsaes_encrypt8
++	vldmia	$key!, {@XMM[9]}		@ round 0 key
++	sub	$const,$const,#_bsaes_encrypt8-.LM0SR
++
++	vldmia	$const!, {@XMM[8]}		@ .LM0SR
++	veor	@XMM[10], @XMM[0], @XMM[9]	@ xor with round0 key
++	veor	@XMM[11], @XMM[1], @XMM[9]
++	 vtbl.8	`&Dlo(@XMM[0])`, {@XMM[10]}, `&Dlo(@XMM[8])`
++	 vtbl.8	`&Dhi(@XMM[0])`, {@XMM[10]}, `&Dhi(@XMM[8])`
++	veor	@XMM[12], @XMM[2], @XMM[9]
++	 vtbl.8	`&Dlo(@XMM[1])`, {@XMM[11]}, `&Dlo(@XMM[8])`
++	 vtbl.8	`&Dhi(@XMM[1])`, {@XMM[11]}, `&Dhi(@XMM[8])`
++	veor	@XMM[13], @XMM[3], @XMM[9]
++	 vtbl.8	`&Dlo(@XMM[2])`, {@XMM[12]}, `&Dlo(@XMM[8])`
++	 vtbl.8	`&Dhi(@XMM[2])`, {@XMM[12]}, `&Dhi(@XMM[8])`
++	veor	@XMM[14], @XMM[4], @XMM[9]
++	 vtbl.8	`&Dlo(@XMM[3])`, {@XMM[13]}, `&Dlo(@XMM[8])`
++	 vtbl.8	`&Dhi(@XMM[3])`, {@XMM[13]}, `&Dhi(@XMM[8])`
++	veor	@XMM[15], @XMM[5], @XMM[9]
++	 vtbl.8	`&Dlo(@XMM[4])`, {@XMM[14]}, `&Dlo(@XMM[8])`
++	 vtbl.8	`&Dhi(@XMM[4])`, {@XMM[14]}, `&Dhi(@XMM[8])`
++	veor	@XMM[10], @XMM[6], @XMM[9]
++	 vtbl.8	`&Dlo(@XMM[5])`, {@XMM[15]}, `&Dlo(@XMM[8])`
++	 vtbl.8	`&Dhi(@XMM[5])`, {@XMM[15]}, `&Dhi(@XMM[8])`
++	veor	@XMM[11], @XMM[7], @XMM[9]
++	 vtbl.8	`&Dlo(@XMM[6])`, {@XMM[10]}, `&Dlo(@XMM[8])`
++	 vtbl.8	`&Dhi(@XMM[6])`, {@XMM[10]}, `&Dhi(@XMM[8])`
++	 vtbl.8	`&Dlo(@XMM[7])`, {@XMM[11]}, `&Dlo(@XMM[8])`
++	 vtbl.8	`&Dhi(@XMM[7])`, {@XMM[11]}, `&Dhi(@XMM[8])`
++_bsaes_encrypt8_bitslice:
++___
++	&bitslice	(@XMM[0..7, 8..11]);
++$code.=<<___;
++	sub	$rounds,$rounds,#1
++	b	.Lenc_sbox
++.align	4
++.Lenc_loop:
++___
++	&ShiftRows	(@XMM[0..7, 8..12]);
++$code.=".Lenc_sbox:\n";
++	&Sbox		(@XMM[0..7, 8..15]);
++$code.=<<___;
++	subs	$rounds,$rounds,#1
++	bcc	.Lenc_done
++___
++	&MixColumns	(@XMM[0,1,4,6,3,7,2,5, 8..15]);
++$code.=<<___;
++	vldmia	$const, {@XMM[12]}		@ .LSR
++	addeq	$const,$const,#0x10
++	bne	.Lenc_loop
++	vldmia	$const, {@XMM[12]}		@ .LSRM0
++	b	.Lenc_loop
++.align	4
++.Lenc_done:
++___
++	# output in lsb > [t0, t1, t4, t6, t3, t7, t2, t5] < msb
++	&bitslice	(@XMM[0,1,4,6,3,7,2,5, 8..11]);
++$code.=<<___;
++	vldmia	$key, {@XMM[8]}			@ last round key
++	veor	@XMM[4], @XMM[4], @XMM[8]
++	veor	@XMM[6], @XMM[6], @XMM[8]
++	veor	@XMM[3], @XMM[3], @XMM[8]
++	veor	@XMM[7], @XMM[7], @XMM[8]
++	veor	@XMM[2], @XMM[2], @XMM[8]
++	veor	@XMM[5], @XMM[5], @XMM[8]
++	veor	@XMM[0], @XMM[0], @XMM[8]
++	veor	@XMM[1], @XMM[1], @XMM[8]
++	bx	lr
++.size	_bsaes_encrypt8,.-_bsaes_encrypt8
++___
++}
++{
++my ($out,$inp,$rounds,$const)=("r12","r4","r5","r6");
++
++sub bitslice_key {
++my @x=reverse(@_[0..7]);
++my ($bs0,$bs1,$bs2,$t2,$t3)=@_[8..12];
++
++	&swapmove	(@x[0,1],1,$bs0,$t2,$t3);
++$code.=<<___;
++	@ &swapmove(@x[2,3],1,$t0,$t2,$t3);
++	vmov	@x[2], @x[0]
++	vmov	@x[3], @x[1]
++___
++	#&swapmove2x(@x[4,5,6,7],1,$t0,$t2,$t3);
++
++	&swapmove2x	(@x[0,2,1,3],2,$bs1,$t2,$t3);
++$code.=<<___;
++	@ &swapmove2x(@x[4,6,5,7],2,$t1,$t2,$t3);
++	vmov	@x[4], @x[0]
++	vmov	@x[6], @x[2]
++	vmov	@x[5], @x[1]
++	vmov	@x[7], @x[3]
++___
++	&swapmove2x	(@x[0,4,1,5],4,$bs2,$t2,$t3);
++	&swapmove2x	(@x[2,6,3,7],4,$bs2,$t2,$t3);
++}
++
++$code.=<<___;
++.type	_bsaes_key_convert,%function
++.align	4
++_bsaes_key_convert:
++	sub	$const,pc,#8			@ _bsaes_key_convert
++	vld1.8	{@XMM[7]},  [$inp]!		@ load round 0 key
++	sub	$const,$const,#_bsaes_key_convert-.LM0
++	vld1.8	{@XMM[15]}, [$inp]!		@ load round 1 key
++
++	vmov.i8	@XMM[8], #0x55			@ compose .LBS0
++	vmov.i8	@XMM[9], #0x33			@ compose .LBS1
++	vmov.i8	@XMM[10],#0x0f			@ compose .LBS2
++	vldmia	$const, {@XMM[13]}		@ .LM0
++
++#ifdef __ARMEL__
++	vrev32.8	@XMM[7],  @XMM[7]
++	vrev32.8	@XMM[15], @XMM[15]
++#endif
++	sub	$rounds,$rounds,#1
++	vstmia	$out!, {@XMM[7]}		@ save round 0 key
++	b	.Lkey_loop
++
++.align	4
++.Lkey_loop:
++	vtbl.8	`&Dlo(@XMM[6])`,{@XMM[15]},`&Dlo(@XMM[13])`
++	vtbl.8	`&Dhi(@XMM[6])`,{@XMM[15]},`&Dhi(@XMM[13])`
++	vmov	@XMM[7], @XMM[6]
++___
++	&bitslice_key	(@XMM[0..7, 8..12]);
++$code.=<<___;
++	vld1.8	{@XMM[15]}, [$inp]!		@ load next round key
++	vmvn	@XMM[5], @XMM[5]		@ "pnot"
++	vmvn	@XMM[6], @XMM[6]
++	vmvn	@XMM[0], @XMM[0]
++	vmvn	@XMM[1], @XMM[1]
++#ifdef __ARMEL__
++	vrev32.8	@XMM[15], @XMM[15]
++#endif
++	subs	$rounds,$rounds,#1
++	vstmia	$out!,{@XMM[0]-@XMM[7]}		@ write bit-sliced round key
++	bne	.Lkey_loop
++
++	vmov.i8	@XMM[7],#0x63			@ compose .L63
++	@ don't save last round key
++	bx	lr
++.size	_bsaes_key_convert,.-_bsaes_key_convert
++___
++}
++
++if (1) {		# following four functions are unsupported interface
++			# used for benchmarking...
++$code.=<<___;
++.globl	bsaes_enc_key_convert
++.type	bsaes_enc_key_convert,%function
++.align	4
++bsaes_enc_key_convert:
++	stmdb	sp!,{r4-r6,lr}
++	vstmdb	sp!,{d8-d15}		@ ABI specification says so
++
++	ldr	r5,[$inp,#240]			@ pass rounds
++	mov	r4,$inp				@ pass key
++	mov	r12,$out			@ pass key schedule
++	bl	_bsaes_key_convert
++	veor	@XMM[7],@XMM[7],@XMM[15]	@ fix up last round key
++	vstmia	r12, {@XMM[7]}			@ save last round key
++
++	vldmia	sp!,{d8-d15}
++	ldmia	sp!,{r4-r6,pc}
++.size	bsaes_enc_key_convert,.-bsaes_enc_key_convert
++
++.globl	bsaes_encrypt_128
++.type	bsaes_encrypt_128,%function
++.align	4
++bsaes_encrypt_128:
++	stmdb	sp!,{r4-r6,lr}
++	vstmdb	sp!,{d8-d15}		@ ABI specification says so
++.Lenc128_loop:
++	vld1.8	{@XMM[0]}, [$inp]!		@ load input
++	vld1.8	{@XMM[1]}, [$inp]!
++	vld1.8	{@XMM[2]}, [$inp]!
++	vld1.8	{@XMM[3]}, [$inp]!
++	vld1.8	{@XMM[4]}, [$inp]!
++	vld1.8	{@XMM[5]}, [$inp]!
++	mov	r4,$key				@ pass the key
++	vld1.8	{@XMM[6]}, [$inp]!
++	mov	r5,#10				@ pass rounds
++	vld1.8	{@XMM[7]}, [$inp]!
++
++	bl	_bsaes_encrypt8
++
++	vst1.8	{@XMM[0]}, [$out]!		@ write output
++	vst1.8	{@XMM[1]}, [$out]!
++	vst1.8	{@XMM[4]}, [$out]!
++	vst1.8	{@XMM[6]}, [$out]!
++	vst1.8	{@XMM[3]}, [$out]!
++	vst1.8	{@XMM[7]}, [$out]!
++	vst1.8	{@XMM[2]}, [$out]!
++	subs	$len,$len,#0x80
++	vst1.8	{@XMM[5]}, [$out]!
++	bhi	.Lenc128_loop
++
++	vldmia	sp!,{d8-d15}
++	ldmia	sp!,{r4-r6,pc}
++.size	bsaes_encrypt_128,.-bsaes_encrypt_128
++
++.globl	bsaes_dec_key_convert
++.type	bsaes_dec_key_convert,%function
++.align	4
++bsaes_dec_key_convert:
++	stmdb	sp!,{r4-r6,lr}
++	vstmdb	sp!,{d8-d15}		@ ABI specification says so
++
++	ldr	r5,[$inp,#240]			@ pass rounds
++	mov	r4,$inp				@ pass key
++	mov	r12,$out			@ pass key schedule
++	bl	_bsaes_key_convert
++	vldmia	$out, {@XMM[6]}
++	vstmia	r12,  {@XMM[15]}		@ save last round key
++	veor	@XMM[7], @XMM[7], @XMM[6]	@ fix up round 0 key
++	vstmia	$out, {@XMM[7]}
++
++	vldmia	sp!,{d8-d15}
++	ldmia	sp!,{r4-r6,pc}
++.size	bsaes_dec_key_convert,.-bsaes_dec_key_convert
++
++.globl	bsaes_decrypt_128
++.type	bsaes_decrypt_128,%function
++.align	4
++bsaes_decrypt_128:
++	stmdb	sp!,{r4-r6,lr}
++	vstmdb	sp!,{d8-d15}		@ ABI specification says so
++.Ldec128_loop:
++	vld1.8	{@XMM[0]}, [$inp]!		@ load input
++	vld1.8	{@XMM[1]}, [$inp]!
++	vld1.8	{@XMM[2]}, [$inp]!
++	vld1.8	{@XMM[3]}, [$inp]!
++	vld1.8	{@XMM[4]}, [$inp]!
++	vld1.8	{@XMM[5]}, [$inp]!
++	mov	r4,$key				@ pass the key
++	vld1.8	{@XMM[6]}, [$inp]!
++	mov	r5,#10				@ pass rounds
++	vld1.8	{@XMM[7]}, [$inp]!
++
++	bl	_bsaes_decrypt8
++
++	vst1.8	{@XMM[0]}, [$out]!		@ write output
++	vst1.8	{@XMM[1]}, [$out]!
++	vst1.8	{@XMM[6]}, [$out]!
++	vst1.8	{@XMM[4]}, [$out]!
++	vst1.8	{@XMM[2]}, [$out]!
++	vst1.8	{@XMM[7]}, [$out]!
++	vst1.8	{@XMM[3]}, [$out]!
++	subs	$len,$len,#0x80
++	vst1.8	{@XMM[5]}, [$out]!
++	bhi	.Ldec128_loop
++
++	vldmia	sp!,{d8-d15}
++	ldmia	sp!,{r4-r6,pc}
++.size	bsaes_decrypt_128,.-bsaes_decrypt_128
++___
++}
++
++$code =~ s/\`([^\`]*)\`/eval($1)/gem;
++
++print $code;
++
++close STDOUT;
+-- 
+1.8.3.1
+
diff --git a/meta/recipes-connectivity/openssl/openssl-1.0.1e/0002-bsaes-armv7.pl-change-preferred-contact.patch b/meta/recipes-connectivity/openssl/openssl-1.0.1e/0002-bsaes-armv7.pl-change-preferred-contact.patch
new file mode 100644
index 0000000..1871a8d
--- /dev/null
+++ b/meta/recipes-connectivity/openssl/openssl-1.0.1e/0002-bsaes-armv7.pl-change-preferred-contact.patch
@@ -0,0 +1,27 @@
+From 5cac503187d5156e601ba6b7e325f0e3d9b00120 Mon Sep 17 00:00:00 2001
+From: Andy Polyakov <appro@openssl.org>
+Date: Sat, 3 Mar 2012 13:04:53 +0000
+Subject: [PATCH 02/15] bsaes-armv7.pl: change preferred contact.
+
+Upstream-Status: Backport
+
+---
+ crypto/aes/asm/bsaes-armv7.pl | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/crypto/aes/asm/bsaes-armv7.pl b/crypto/aes/asm/bsaes-armv7.pl
+index a93c8ed..d9748f4 100644
+--- a/crypto/aes/asm/bsaes-armv7.pl
++++ b/crypto/aes/asm/bsaes-armv7.pl
+@@ -1,7 +1,7 @@
+ #!/usr/bin/env perl
+ 
+ # ====================================================================
+-# Written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
++# Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
+ # project. The module is, however, dual licensed under OpenSSL and
+ # CRYPTOGAMS licenses depending on where you obtain it. For further
+ # details see http://www.openssl.org/~appro/cryptogams/.
+-- 
+1.8.3.1
+
diff --git a/meta/recipes-connectivity/openssl/openssl-1.0.1e/0003-bsaes-armv7.pl-optmize-Sbox-and-key-conversion.patch b/meta/recipes-connectivity/openssl/openssl-1.0.1e/0003-bsaes-armv7.pl-optmize-Sbox-and-key-conversion.patch
new file mode 100644
index 0000000..cfd76c8
--- /dev/null
+++ b/meta/recipes-connectivity/openssl/openssl-1.0.1e/0003-bsaes-armv7.pl-optmize-Sbox-and-key-conversion.patch
@@ -0,0 +1,167 @@
+From 0925de093d7f7d3585ac89b182e3496634384c15 Mon Sep 17 00:00:00 2001
+From: Andy Polyakov <appro@openssl.org>
+Date: Fri, 16 Mar 2012 21:41:48 +0000
+Subject: [PATCH 03/15] bsaes-armv7.pl: optmize Sbox and key conversion.
+
+Upstream-Status: Backport
+
+---
+ crypto/aes/asm/bsaes-armv7.pl | 87 ++++++++++++++++++++-----------------------
+ 1 file changed, 41 insertions(+), 46 deletions(-)
+
+diff --git a/crypto/aes/asm/bsaes-armv7.pl b/crypto/aes/asm/bsaes-armv7.pl
+index d9748f4..83be927 100644
+--- a/crypto/aes/asm/bsaes-armv7.pl
++++ b/crypto/aes/asm/bsaes-armv7.pl
+@@ -18,9 +18,9 @@
+ # only low-level primitives and unsupported entry points, just enough
+ # to collect performance results, which for Cortex-A8 core are:
+ #
+-# encrypt	20.9 cycles per byte processed with 128-bit key
+-# decrypt	25.6 cycles per byte processed with 128-bit key
+-# key conv.	900  cycles per 128-bit key/0.34 of 8x block
++# encrypt	20.0 cycles per byte processed with 128-bit key
++# decrypt	24.7 cycles per byte processed with 128-bit key
++# key conv.	440  cycles per 128-bit key/0.17 of 8x block
+ #
+ # When comparing to x86_64 results keep in mind that NEON unit is
+ # [mostly] single-issue and thus can't benefit from parallelism. And
+@@ -292,24 +292,19 @@ $code.=<<___;
+ 	vand	@t[3], @t[3], @t[1]
+ 
+ 	veor	@s[2], @t[0], @t[3]
++	veor	@s[1], @t[2], @t[3]
++
+ 	vand	@s[3], @s[0], @s[2]
++	vbsl	@s[1], @t[1], @t[0]
+ 
+ 	veor	@s[3], @s[3], @t[2]
+-	veor	@s[1], @t[1], @t[0]
+-
+-	veor	@t[3], @t[3], @t[2]
+-
+-	vand	@s[1], @s[1], @t[3]
+-
+-	veor	@s[1], @s[1], @t[0]
+-
+ 	veor	@t[2], @s[2], @s[1]
+-	veor	@t[1], @t[1], @s[1]
+ 
+ 	vand	@t[2], @t[2], @t[0]
++	vbsl	@t[0], @s[2], @s[1]
+ 
+ 	veor	@s[2], @s[2], @t[2]
+-	veor	@t[1], @t[1], @t[2]
++	veor	@t[1], @t[1], @t[0]
+ 
+ 	vand	@s[2], @s[2], @s[3]
+ 
+@@ -827,10 +822,13 @@ _bsaes_key_convert:
+ 	sub	$const,$const,#_bsaes_key_convert-.LM0
+ 	vld1.8	{@XMM[15]}, [$inp]!		@ load round 1 key
+ 
+-	vmov.i8	@XMM[8], #0x55			@ compose .LBS0
+-	vmov.i8	@XMM[9], #0x33			@ compose .LBS1
+-	vmov.i8	@XMM[10],#0x0f			@ compose .LBS2
+-	vldmia	$const, {@XMM[13]}		@ .LM0
++	vmov.i8	@XMM[8],  #0x01			@ bit masks
++	vmov.i8	@XMM[9],  #0x02
++	vmov.i8	@XMM[10], #0x04
++	vmov.i8	@XMM[11], #0x08
++	vmov.i8	@XMM[12], #0x10
++	vmov.i8	@XMM[13], #0x20
++	vldmia	$const, {@XMM[14]}		@ .LM0
+ 
+ #ifdef __ARMEL__
+ 	vrev32.8	@XMM[7],  @XMM[7]
+@@ -842,17 +840,24 @@ _bsaes_key_convert:
+ 
+ .align	4
+ .Lkey_loop:
+-	vtbl.8	`&Dlo(@XMM[6])`,{@XMM[15]},`&Dlo(@XMM[13])`
+-	vtbl.8	`&Dhi(@XMM[6])`,{@XMM[15]},`&Dhi(@XMM[13])`
+-	vmov	@XMM[7], @XMM[6]
+-___
+-	&bitslice_key	(@XMM[0..7, 8..12]);
+-$code.=<<___;
++	vtbl.8	`&Dlo(@XMM[7])`,{@XMM[15]},`&Dlo(@XMM[14])`
++	vtbl.8	`&Dhi(@XMM[7])`,{@XMM[15]},`&Dhi(@XMM[14])`
++	vmov.i8	@XMM[6],  #0x40
++	vmov.i8	@XMM[15], #0x80
++
++	vtst.8	@XMM[0], @XMM[7], @XMM[8]
++	vtst.8	@XMM[1], @XMM[7], @XMM[9]
++	vtst.8	@XMM[2], @XMM[7], @XMM[10]
++	vtst.8	@XMM[3], @XMM[7], @XMM[11]
++	vtst.8	@XMM[4], @XMM[7], @XMM[12]
++	vtst.8	@XMM[5], @XMM[7], @XMM[13]
++	vtst.8	@XMM[6], @XMM[7], @XMM[6]
++	vtst.8	@XMM[7], @XMM[7], @XMM[15]
+ 	vld1.8	{@XMM[15]}, [$inp]!		@ load next round key
+-	vmvn	@XMM[5], @XMM[5]		@ "pnot"
+-	vmvn	@XMM[6], @XMM[6]
+-	vmvn	@XMM[0], @XMM[0]
++	vmvn	@XMM[0], @XMM[0]		@ "pnot"
+ 	vmvn	@XMM[1], @XMM[1]
++	vmvn	@XMM[5], @XMM[5]
++	vmvn	@XMM[6], @XMM[6]
+ #ifdef __ARMEL__
+ 	vrev32.8	@XMM[15], @XMM[15]
+ #endif
+@@ -895,21 +900,16 @@ bsaes_encrypt_128:
+ 	stmdb	sp!,{r4-r6,lr}
+ 	vstmdb	sp!,{d8-d15}		@ ABI specification says so
+ .Lenc128_loop:
+-	vld1.8	{@XMM[0]}, [$inp]!		@ load input
+-	vld1.8	{@XMM[1]}, [$inp]!
+-	vld1.8	{@XMM[2]}, [$inp]!
+-	vld1.8	{@XMM[3]}, [$inp]!
+-	vld1.8	{@XMM[4]}, [$inp]!
+-	vld1.8	{@XMM[5]}, [$inp]!
++	vld1.8	{@XMM[0]-@XMM[1]}, [$inp]!	@ load input
++	vld1.8	{@XMM[2]-@XMM[3]}, [$inp]!
+ 	mov	r4,$key				@ pass the key
+-	vld1.8	{@XMM[6]}, [$inp]!
++	vld1.8	{@XMM[4]-@XMM[5]}, [$inp]!
+ 	mov	r5,#10				@ pass rounds
+-	vld1.8	{@XMM[7]}, [$inp]!
++	vld1.8	{@XMM[6]-@XMM[7]}, [$inp]!
+ 
+ 	bl	_bsaes_encrypt8
+ 
+-	vst1.8	{@XMM[0]}, [$out]!		@ write output
+-	vst1.8	{@XMM[1]}, [$out]!
++	vst1.8	{@XMM[0]-@XMM[1]}, [$out]!	@ write output
+ 	vst1.8	{@XMM[4]}, [$out]!
+ 	vst1.8	{@XMM[6]}, [$out]!
+ 	vst1.8	{@XMM[3]}, [$out]!
+@@ -950,21 +950,16 @@ bsaes_decrypt_128:
+ 	stmdb	sp!,{r4-r6,lr}
+ 	vstmdb	sp!,{d8-d15}		@ ABI specification says so
+ .Ldec128_loop:
+-	vld1.8	{@XMM[0]}, [$inp]!		@ load input
+-	vld1.8	{@XMM[1]}, [$inp]!
+-	vld1.8	{@XMM[2]}, [$inp]!
+-	vld1.8	{@XMM[3]}, [$inp]!
+-	vld1.8	{@XMM[4]}, [$inp]!
+-	vld1.8	{@XMM[5]}, [$inp]!
++	vld1.8	{@XMM[0]-@XMM[1]}, [$inp]!	@ load input
++	vld1.8	{@XMM[2]-@XMM[3]}, [$inp]!
+ 	mov	r4,$key				@ pass the key
+-	vld1.8	{@XMM[6]}, [$inp]!
++	vld1.8	{@XMM[4]-@XMM[5]}, [$inp]!
+ 	mov	r5,#10				@ pass rounds
+-	vld1.8	{@XMM[7]}, [$inp]!
++	vld1.8	{@XMM[6]-@XMM[7]}, [$inp]!
+ 
+ 	bl	_bsaes_decrypt8
+ 
+-	vst1.8	{@XMM[0]}, [$out]!		@ write output
+-	vst1.8	{@XMM[1]}, [$out]!
++	vst1.8	{@XMM[0]-@XMM[1]}, [$out]!	@ write output
+ 	vst1.8	{@XMM[6]}, [$out]!
+ 	vst1.8	{@XMM[4]}, [$out]!
+ 	vst1.8	{@XMM[2]}, [$out]!
+-- 
+1.8.3.1
+
diff --git a/meta/recipes-connectivity/openssl/openssl-1.0.1e/0004-bsaes-armv7.pl-minor-performance-squeeze-on-Snapdrag.patch b/meta/recipes-connectivity/openssl/openssl-1.0.1e/0004-bsaes-armv7.pl-minor-performance-squeeze-on-Snapdrag.patch
new file mode 100644
index 0000000..34dbd80
--- /dev/null
+++ b/meta/recipes-connectivity/openssl/openssl-1.0.1e/0004-bsaes-armv7.pl-minor-performance-squeeze-on-Snapdrag.patch
@@ -0,0 +1,264 @@
+From 9b886dd6b78d1a1dc9af201435488e46243b77b4 Mon Sep 17 00:00:00 2001
+From: Andy Polyakov <appro@openssl.org>
+Date: Tue, 4 Sep 2012 08:26:50 +0000
+Subject: [PATCH 04/15] bsaes-armv7.pl: minor performance squeeze on Snapdragon
+ S4.
+
+Upstream-Status: Backport
+
+---
+ crypto/aes/asm/bsaes-armv7.pl | 72 ++++++++++++++++++++++---------------------
+ 1 file changed, 37 insertions(+), 35 deletions(-)
+
+diff --git a/crypto/aes/asm/bsaes-armv7.pl b/crypto/aes/asm/bsaes-armv7.pl
+index 83be927..14a52c7 100644
+--- a/crypto/aes/asm/bsaes-armv7.pl
++++ b/crypto/aes/asm/bsaes-armv7.pl
+@@ -19,13 +19,16 @@
+ # to collect performance results, which for Cortex-A8 core are:
+ #
+ # encrypt	20.0 cycles per byte processed with 128-bit key
+-# decrypt	24.7 cycles per byte processed with 128-bit key
++# decrypt	24.5 cycles per byte processed with 128-bit key
+ # key conv.	440  cycles per 128-bit key/0.17 of 8x block
+ #
++# Snapdragon S4 encrypts byte in 18.3 cycles and decrypts in 23.3.
++#
+ # When comparing to x86_64 results keep in mind that NEON unit is
+-# [mostly] single-issue and thus can't benefit from parallelism. And
+-# when comparing to aes-armv4 results keep in mind key schedule
+-# conversion overhead (see bsaes-x86_64.pl for details)...
++# [mostly] single-issue and thus can't [fully] benefit from
++# instruction-level parallelism. And when comparing to aes-armv4
++# results keep in mind key schedule conversion overhead (see
++# bsaes-x86_64.pl for further details)...
+ #
+ #						<appro@openssl.org>
+ 
+@@ -57,8 +60,8 @@ sub InBasisChange {
+ # output in lsb > [b6, b5, b0, b3, b7, b1, b4, b2] < msb 
+ my @b=@_[0..7];
+ $code.=<<___;
+-	veor	@b[5], @b[5], @b[6]
+ 	veor	@b[2], @b[2], @b[1]
++	veor	@b[5], @b[5], @b[6]
+ 	veor	@b[3], @b[3], @b[0]
+ 	veor	@b[6], @b[6], @b[2]
+ 	veor	@b[5], @b[5], @b[0]
+@@ -68,9 +71,9 @@ $code.=<<___;
+ 	veor	@b[7], @b[7], @b[5]
+ 	veor	@b[3], @b[3], @b[4]
+ 	veor	@b[4], @b[4], @b[5]
+-	veor	@b[3], @b[3], @b[1]
+ 
+ 	veor	@b[2], @b[2], @b[7]
++	veor	@b[3], @b[3], @b[1]
+ 	veor	@b[1], @b[1], @b[5]
+ ___
+ }
+@@ -82,8 +85,8 @@ my @b=@_[0..7];
+ $code.=<<___;
+ 	veor	@b[0], @b[0], @b[6]
+ 	veor	@b[1], @b[1], @b[4]
+-	veor	@b[2], @b[2], @b[0]
+ 	veor	@b[4], @b[4], @b[6]
++	veor	@b[2], @b[2], @b[0]
+ 	veor	@b[6], @b[6], @b[1]
+ 
+ 	veor	@b[1], @b[1], @b[5]
+@@ -107,19 +110,20 @@ my @s=@_[12..15];
+ 	&InvOutBasisChange	(@b[3,7,0,4,5,1,2,6]);
+ }
+ 
+-sub InvInBasisChange {		# OutBasisChange in reverse
++sub InvInBasisChange {		# OutBasisChange in reverse (with twist)
+ my @b=@_[5,1,2,6,3,7,0,4];
+ $code.=<<___
++	 veor	@b[1], @b[1], @b[7]
+ 	veor	@b[4], @b[4], @b[7]
+ 
+ 	veor	@b[7], @b[7], @b[5]
++	 veor	@b[1], @b[1], @b[3]
+ 	veor	@b[2], @b[2], @b[5]
+ 	veor	@b[3], @b[3], @b[7]
+-	veor	@b[5], @b[5], @b[3]
+-	veor	@b[1], @b[1], @b[5]
+ 
+ 	veor	@b[6], @b[6], @b[1]
+ 	veor	@b[2], @b[2], @b[0]
++	 veor	@b[5], @b[5], @b[3]
+ 	veor	@b[4], @b[4], @b[6]
+ 	veor	@b[0], @b[0], @b[6]
+ 	veor	@b[1], @b[1], @b[4]
+@@ -151,15 +155,15 @@ sub Mul_GF4 {
+ #;*************************************************************
+ #;* Mul_GF4: Input x0-x1,y0-y1 Output x0-x1 Temp t0 (8) *
+ #;*************************************************************
+-my ($x0,$x1,$y0,$y1,$t0)=@_;
++my ($x0,$x1,$y0,$y1,$t0,$t1)=@_;
+ $code.=<<___;
+ 	veor 	$t0, $y0, $y1
+ 	vand	$t0, $t0, $x0
+ 	veor	$x0, $x0, $x1
+-	vand	$x1, $x1, $y0
++	vand	$t1, $x1, $y0
+ 	vand	$x0, $x0, $y1
+-	veor	$x0, $x0, $x1
+-	veor	$x1, $x1, $t0
++	veor	$x1, $t1, $t0
++	veor	$x0, $x0, $t1
+ ___
+ }
+ 
+@@ -203,13 +207,11 @@ my @x=@_[0..7];
+ my @y=@_[8..11];
+ my @t=@_[12..15];
+ $code.=<<___;
+-	vmov	@t[0], @x[0]
+-	vmov	@t[1], @x[1]
++	veor	@t[0], @x[0], @x[2]
++	veor	@t[1], @x[1], @x[3]
+ ___
+-	&Mul_GF4  	(@x[0], @x[1], @y[0], @y[1], @t[2]);
++	&Mul_GF4  	(@x[0], @x[1], @y[0], @y[1], @t[2..3]);
+ $code.=<<___;
+-	veor	@t[0], @t[0], @x[2]
+-	veor	@t[1], @t[1], @x[3]
+ 	veor	@y[0], @y[0], @y[2]
+ 	veor	@y[1], @y[1], @y[3]
+ ___
+@@ -230,7 +232,7 @@ $code.=<<___;
+ 	veor	@y[0], @y[0], @y[2]
+ 	veor	@y[1], @y[1], @y[3]
+ ___
+-	&Mul_GF4  	(@x[4], @x[5], @y[0], @y[1], @t[3]);
++	&Mul_GF4  	(@x[4], @x[5], @y[0], @y[1], @t[2..3]);
+ $code.=<<___;
+ 	veor	@x[4], @x[4], @t[0]
+ 	veor	@x[6], @x[6], @t[0]
+@@ -402,8 +404,8 @@ $code.=<<___;
+ 	 vext.8	@x[3], @x[6], @x[6], #8
+ 	veor	@t[4], @t[4], @x[7]
+ 	 vext.8	@x[6], @x[2], @x[2], #8
+-	veor	@x[2], @t[0], @t[4]
+ 	veor	@x[7], @t[1], @t[5]
++	veor	@x[2], @t[0], @t[4]
+ 
+ 	veor	@x[4], @x[4], @t[3]
+ 	veor	@x[5], @x[5], @t[7]
+@@ -422,8 +424,8 @@ $code.=<<___;
+ 	@ multiplication by 0x0e
+ 	vext.8	@t[7], @x[7], @x[7], #12
+ 	vmov	@t[2], @x[2]
+-	veor	@x[7], @x[7], @x[5]		@ 7 5
+ 	veor	@x[2], @x[2], @x[5]		@ 2 5
++	veor	@x[7], @x[7], @x[5]		@ 7 5
+ 	vext.8	@t[0], @x[0], @x[0], #12
+ 	vmov	@t[5], @x[5]
+ 	veor	@x[5], @x[5], @x[0]		@ 5 0		[1]
+@@ -431,8 +433,8 @@ $code.=<<___;
+ 	vext.8	@t[1], @x[1], @x[1], #12
+ 	veor	@x[1], @x[1], @x[2]		@ 1 25
+ 	veor	@x[0], @x[0], @x[6]		@ 01 6		[2]
+-	veor	@x[1], @x[1], @x[3]		@ 125 3		[4]
+ 	vext.8	@t[3], @x[3], @x[3], #12
++	veor	@x[1], @x[1], @x[3]		@ 125 3		[4]
+ 	veor	@x[2], @x[2], @x[0]		@ 25 016	[3]
+ 	veor	@x[3], @x[3], @x[7]		@ 3 75
+ 	veor	@x[7], @x[7], @x[6]		@ 75 6		[0]
+@@ -451,21 +453,21 @@ $code.=<<___;
+ 	@ multiplication by 0x0b
+ 	veor	@y[1], @y[1], @y[0]
+ 	veor	@y[0], @y[0], @t[0]
+-	veor	@y[1], @y[1], @t[1]
+ 	vext.8	@t[2], @t[2], @t[2], #12
++	veor	@y[1], @y[1], @t[1]
+ 	veor	@y[0], @y[0], @t[5]
++	vext.8	@t[4], @t[4], @t[4], #12
+ 	veor	@y[1], @y[1], @t[6]
+ 	veor	@y[0], @y[0], @t[7]
+-	vext.8	@t[4], @t[4], @t[4], #12
+ 	veor	@t[7], @t[7], @t[6]		@ clobber t[7]
+-	veor	@y[1], @y[1], @y[0]
+ 
+ 	veor	@y[3], @y[3], @t[0]
++	 veor	@y[1], @y[1], @y[0]
+ 	vext.8	@t[0], @t[0], @t[0], #12
+ 	veor	@y[2], @y[2], @t[1]
+ 	veor	@y[4], @y[4], @t[1]
+-	veor	@y[2], @y[2], @t[2]
+ 	vext.8	@t[1], @t[1], @t[1], #12
++	veor	@y[2], @y[2], @t[2]
+ 	veor	@y[3], @y[3], @t[2]
+ 	veor	@y[5], @y[5], @t[2]
+ 	veor	@y[2], @y[2], @t[7]
+@@ -473,8 +475,8 @@ $code.=<<___;
+ 	veor	@y[3], @y[3], @t[3]
+ 	veor	@y[6], @y[6], @t[3]
+ 	veor	@y[4], @y[4], @t[3]
+-	vext.8	@t[3], @t[3], @t[3], #12
+ 	veor	@y[7], @y[7], @t[4]
++	vext.8	@t[3], @t[3], @t[3], #12
+ 	veor	@y[5], @y[5], @t[4]
+ 	veor	@y[7], @y[7], @t[7]
+ 	veor	@y[3], @y[3], @t[5]
+@@ -488,16 +490,16 @@ $code.=<<___;
+ 
+ 	veor	@t[7], @t[7], @t[5]
+ 	vext.8	@t[5], @t[5], @t[5], #12
+-	veor	@t[7], @t[7], @t[6]		@ restore t[7]
+ 
+ 	@ multiplication by 0x0d
+ 	veor	@y[4], @y[4], @y[7]
++	 veor	@t[7], @t[7], @t[6]		@ restore t[7]
+ 	veor	@y[7], @y[7], @t[4]
+ 	vext.8	@t[6], @t[6], @t[6], #12
+ 	veor	@y[2], @y[2], @t[0]
+ 	veor	@y[7], @y[7], @t[5]
+-	veor	@y[2], @y[2], @t[2]
+ 	vext.8	@t[7], @t[7], @t[7], #12
++	veor	@y[2], @y[2], @t[2]
+ 
+ 	veor	@y[3], @y[3], @y[1]
+ 	veor	@y[1], @y[1], @t[1]
+@@ -505,8 +507,8 @@ $code.=<<___;
+ 	veor	@y[3], @y[3], @t[0]
+ 	veor	@y[1], @y[1], @t[5]
+ 	veor	@y[0], @y[0], @t[5]
+-	veor	@y[1], @y[1], @t[7]
+ 	vext.8	@t[0], @t[0], @t[0], #12
++	veor	@y[1], @y[1], @t[7]
+ 	veor	@y[0], @y[0], @t[6]
+ 	veor	@y[3], @y[3], @y[1]
+ 	veor	@y[4], @y[4], @t[1]
+@@ -515,9 +517,9 @@ $code.=<<___;
+ 	veor	@y[7], @y[7], @t[7]
+ 	veor	@y[4], @y[4], @t[2]
+ 	veor	@y[5], @y[5], @t[2]
+-	vext.8	@t[2], @t[2], @t[2], #12
+ 	veor	@y[2], @y[2], @t[6]
+ 	veor	@t[6], @t[6], @t[3]		@ clobber t[6]
++	vext.8	@t[2], @t[2], @t[2], #12
+ 	veor	@y[4], @y[4], @y[7]
+ 	veor	@y[3], @y[3], @t[6]
+ 
+@@ -544,13 +546,13 @@ $code.=<<___;
+ 	veor	@t[6], @t[6], @t[7]		@ clobber t[6]
+ 	veor	@y[4], @y[4], @t[1]
+ 	veor	@y[7], @y[7], @t[4]
+-	veor	@t[4], @t[4], @y[4]		@ t[4]=y[4]
+ 	veor	@y[6], @y[6], @t[3]
+-	veor	@t[3], @t[3], @y[3]		@ t[3]=y[3]
+ 	veor	@y[5], @y[5], @t[2]
++	veor	@t[4], @t[4], @y[4]		@ t[4]=y[4]
++	veor	@t[3], @t[3], @y[3]		@ t[3]=y[3]
++	veor	@t[5], @t[5], @y[5]		@ t[5]=y[5]
+ 	veor	@t[2], @t[2], @y[2]		@ t[2]=y[2]
+ 	veor	@t[3], @t[3], @t[7]
+-	veor	@t[5], @t[5], @y[5]		@ t[5]=y[5]
+ 	veor	@XMM[5], @t[5], @t[6]
+ 	veor	@XMM[6], @t[6], @y[6]		@ t[6]=y[6]
+ 	veor	@XMM[2], @t[2], @t[6]
+-- 
+1.8.3.1
+
diff --git a/meta/recipes-connectivity/openssl/openssl-1.0.1e/0005-bsaes-armv7.pl-even-closer-shave.patch b/meta/recipes-connectivity/openssl/openssl-1.0.1e/0005-bsaes-armv7.pl-even-closer-shave.patch
new file mode 100644
index 0000000..efecc30
--- /dev/null
+++ b/meta/recipes-connectivity/openssl/openssl-1.0.1e/0005-bsaes-armv7.pl-even-closer-shave.patch
@@ -0,0 +1,103 @@
+From ade4b80a3d959f20c9fb4a7afb60694b4e4c157f Mon Sep 17 00:00:00 2001
+From: Andy Polyakov <appro@openssl.org>
+Date: Tue, 4 Sep 2012 14:39:05 +0000
+Subject: [PATCH 05/15] bsaes-armv7.pl: even closer shave.
+
+Upstream-Status: Backport
+
+---
+ crypto/aes/asm/bsaes-armv7.pl | 32 ++++++++++++++++----------------
+ 1 file changed, 16 insertions(+), 16 deletions(-)
+
+diff --git a/crypto/aes/asm/bsaes-armv7.pl b/crypto/aes/asm/bsaes-armv7.pl
+index 14a52c7..5047f0d 100644
+--- a/crypto/aes/asm/bsaes-armv7.pl
++++ b/crypto/aes/asm/bsaes-armv7.pl
+@@ -18,11 +18,11 @@
+ # only low-level primitives and unsupported entry points, just enough
+ # to collect performance results, which for Cortex-A8 core are:
+ #
+-# encrypt	20.0 cycles per byte processed with 128-bit key
+-# decrypt	24.5 cycles per byte processed with 128-bit key
++# encrypt	19.7 cycles per byte processed with 128-bit key
++# decrypt	24.1 cycles per byte processed with 128-bit key
+ # key conv.	440  cycles per 128-bit key/0.17 of 8x block
+ #
+-# Snapdragon S4 encrypts byte in 18.3 cycles and decrypts in 23.3.
++# Snapdragon S4 encrypts byte in 17.9 cycles and decrypts in 22.9.
+ #
+ # When comparing to x86_64 results keep in mind that NEON unit is
+ # [mostly] single-issue and thus can't [fully] benefit from
+@@ -262,22 +262,22 @@ $code.=<<___;
+ 	vorr	@t[3], @t[3], @s[0]
+ 	veor	@s[0], @s[0], @t[1]
+ 	vand	@t[0], @t[0], @t[1]
++	veor	@t[1], @x[3], @x[2]
+ 	vand	@s[3], @s[3], @s[0]
+-	veor	@s[0], @x[3], @x[2]
+-	vand	@s[1], @s[1], @s[0]
++	vand	@s[1], @s[1], @t[1]
++	veor	@t[1], @x[4], @x[5]
++	veor	@s[0], @x[1], @x[0]
+ 	veor	@t[3], @t[3], @s[1]
+ 	veor	@t[2], @t[2], @s[1]
+-	veor	@s[1], @x[4], @x[5]
+-	veor	@s[0], @x[1], @x[0]
+-	vorr	@t[1], @s[1], @s[0]
+-	vand	@s[1], @s[1], @s[0]
+-	veor	@t[0], @t[0], @s[1]
++	vand	@s[1], @t[1], @s[0]
++	vorr	@t[1], @t[1], @s[0]
+ 	veor	@t[3], @t[3], @s[3]
++	veor	@t[0], @t[0], @s[1]
+ 	veor	@t[2], @t[2], @s[2]
+ 	veor	@t[1], @t[1], @s[3]
+ 	veor	@t[0], @t[0], @s[2]
+-	veor	@t[1], @t[1], @s[2]
+ 	vand	@s[0], @x[7], @x[3]
++	veor	@t[1], @t[1], @s[2]
+ 	vand	@s[1], @x[6], @x[2]
+ 	vand	@s[2], @x[5], @x[1]
+ 	vorr	@s[3], @x[4], @x[0]
+@@ -381,13 +381,13 @@ $code.=<<___;
+ 	 veor	@x[5], @x[5], @t[5]
+ 	vext.8	@t[7], @x[7], @x[7], #12
+ 	 veor	@x[6], @x[6], @t[6]
+-	 veor	@x[7], @x[7], @t[7]
+ 
+ 	veor	@t[1], @t[1], @x[0]
++	 veor	@x[7], @x[7], @t[7]
+ 	 vext.8	@x[0], @x[0], @x[0], #8		@ (x0 ^ (x0 <<< 32)) <<< 64)
++	veor	@t[2], @t[2], @x[1]
+ 	veor	@t[0], @t[0], @x[7]
+ 	veor	@t[1], @t[1], @x[7]
+-	veor	@t[2], @t[2], @x[1]
+ 	 vext.8	@x[1], @x[1], @x[1], #8
+ 	veor	@t[5], @t[5], @x[4]
+ 	 veor	@x[0], @x[0], @t[0]
+@@ -400,9 +400,9 @@ $code.=<<___;
+ 	 vext.8	@x[4], @x[3], @x[3], #8
+ 	veor	@t[3], @t[3], @x[2]
+ 	 vext.8	@x[5], @x[7], @x[7], #8
+-	veor	@t[3], @t[3], @x[7]
+-	 vext.8	@x[3], @x[6], @x[6], #8
+ 	veor	@t[4], @t[4], @x[7]
++	 vext.8	@x[3], @x[6], @x[6], #8
++	veor	@t[3], @t[3], @x[7]
+ 	 vext.8	@x[6], @x[2], @x[2], #8
+ 	veor	@x[7], @t[1], @t[5]
+ 	veor	@x[2], @t[0], @t[4]
+@@ -479,9 +479,9 @@ $code.=<<___;
+ 	vext.8	@t[3], @t[3], @t[3], #12
+ 	veor	@y[5], @y[5], @t[4]
+ 	veor	@y[7], @y[7], @t[7]
++	veor	@t[7], @t[7], @t[5]		@ clobber t[7] even more
+ 	veor	@y[3], @y[3], @t[5]
+ 	veor	@y[4], @y[4], @t[4]
+-	veor	@t[7], @t[7], @t[5]		@ clobber t[7] even more
+ 
+ 	veor	@y[5], @y[5], @t[7]
+ 	vext.8	@t[4], @t[4], @t[4], #12
+-- 
+1.8.3.1
+
diff --git a/meta/recipes-connectivity/openssl/openssl-1.0.1e/0006-bsaes-armv7.pl-closest-shave.-While-0.3-cpb-improvem.patch b/meta/recipes-connectivity/openssl/openssl-1.0.1e/0006-bsaes-armv7.pl-closest-shave.-While-0.3-cpb-improvem.patch
new file mode 100644
index 0000000..663e2fd
--- /dev/null
+++ b/meta/recipes-connectivity/openssl/openssl-1.0.1e/0006-bsaes-armv7.pl-closest-shave.-While-0.3-cpb-improvem.patch
@@ -0,0 +1,85 @@
+From 8d78c1438b2ae1146168637fe4f66e30eedd16ee Mon Sep 17 00:00:00 2001
+From: Andy Polyakov <appro@openssl.org>
+Date: Fri, 7 Sep 2012 12:29:18 +0000
+Subject: [PATCH 06/15] bsaes-armv7.pl: closest shave. While 0.3 cpb
+ improvement on S4 appears insignificant, it's actually 4 cycles less for 14
+ instructions sequence!
+
+Upstream-Status: Backport
+
+---
+ crypto/aes/asm/bsaes-armv7.pl | 35 +++++++++++++++++------------------
+ 1 file changed, 17 insertions(+), 18 deletions(-)
+
+diff --git a/crypto/aes/asm/bsaes-armv7.pl b/crypto/aes/asm/bsaes-armv7.pl
+index 5047f0d..d901c58 100644
+--- a/crypto/aes/asm/bsaes-armv7.pl
++++ b/crypto/aes/asm/bsaes-armv7.pl
+@@ -18,11 +18,13 @@
+ # only low-level primitives and unsupported entry points, just enough
+ # to collect performance results, which for Cortex-A8 core are:
+ #
+-# encrypt	19.7 cycles per byte processed with 128-bit key
+-# decrypt	24.1 cycles per byte processed with 128-bit key
+-# key conv.	440  cycles per 128-bit key/0.17 of 8x block
++# encrypt	19.5 cycles per byte processed with 128-bit key
++# decrypt	24.0 cycles per byte processed with 128-bit key
++# key conv.	440  cycles per 128-bit key/0.18 of 8x block
+ #
+-# Snapdragon S4 encrypts byte in 17.9 cycles and decrypts in 22.9.
++# Snapdragon S4 encrypts byte in 17.6 cycles and decrypts in 22.6,
++# which is [much] worse than anticipated (for further details see
++# http://www.openssl.org/~appro/Snapdragon-S4.html).
+ #
+ # When comparing to x86_64 results keep in mind that NEON unit is
+ # [mostly] single-issue and thus can't [fully] benefit from
+@@ -282,35 +284,32 @@ $code.=<<___;
+ 	vand	@s[2], @x[5], @x[1]
+ 	vorr	@s[3], @x[4], @x[0]
+ 	veor	@t[3], @t[3], @s[0]
+-	veor	@t[2], @t[2], @s[1]
+ 	veor	@t[1], @t[1], @s[2]
+ 	veor	@t[0], @t[0], @s[3]
++	veor	@t[2], @t[2], @s[1]
+ 
+ 	@ Inv_GF16 \t0, \t1, \t2, \t3, \s0, \s1, \s2, \s3
+ 
+ 	@ new smaller inversion
+ 
+-	veor	@s[0], @t[3], @t[2]
+-	vand	@t[3], @t[3], @t[1]
++	vand	@s[2], @t[3], @t[1]
++	vmov	@s[0], @t[0]
+ 
+-	veor	@s[2], @t[0], @t[3]
+-	veor	@s[1], @t[2], @t[3]
++	veor	@s[1], @t[2], @s[2]
++	veor	@s[3], @t[0], @s[2]
++	veor	@s[2], @t[0], @s[2]	@ @s[2]=@s[3]
+ 
+-	vand	@s[3], @s[0], @s[2]
+ 	vbsl	@s[1], @t[1], @t[0]
++	vbsl	@s[3], @t[3], @t[2]
++	veor	@t[3], @t[3], @t[2]
+ 
+-	veor	@s[3], @s[3], @t[2]
+-	veor	@t[2], @s[2], @s[1]
+-
+-	vand	@t[2], @t[2], @t[0]
++	vbsl	@s[0], @s[1], @s[2]
+ 	vbsl	@t[0], @s[2], @s[1]
+ 
+-	veor	@s[2], @s[2], @t[2]
++	vand	@s[2], @s[0], @s[3]
+ 	veor	@t[1], @t[1], @t[0]
+ 
+-	vand	@s[2], @s[2], @s[3]
+-
+-	veor	@s[2], @s[2], @s[0]
++	veor	@s[2], @s[2], @t[3]
+ ___
+ # output in s3, s2, s1, t1
+ 
+-- 
+1.8.3.1
+
diff --git a/meta/recipes-connectivity/openssl/openssl-1.0.1e/0007-bsaes-armv7.pl-take-it-into-build-loop.patch b/meta/recipes-connectivity/openssl/openssl-1.0.1e/0007-bsaes-armv7.pl-take-it-into-build-loop.patch
new file mode 100644
index 0000000..a54d90a
--- /dev/null
+++ b/meta/recipes-connectivity/openssl/openssl-1.0.1e/0007-bsaes-armv7.pl-take-it-into-build-loop.patch
@@ -0,0 +1,76 @@
+From 038a616d293f818e423897453d5087f9c90991c6 Mon Sep 17 00:00:00 2001
+From: Andy Polyakov <appro@openssl.org>
+Date: Tue, 23 Apr 2013 17:49:54 +0200
+Subject: [PATCH 07/15] bsaes-armv7.pl: take it into build loop.
+
+Upstream-Status: Backport
+
+---
+ Configure                     | 2 +-
+ crypto/aes/Makefile           | 2 ++
+ crypto/aes/asm/bsaes-armv7.pl | 9 +++++++++
+ 4 files changed, 14 insertions(+), 3 deletions(-)
+
+diff --git a/Configure b/Configure
+index 9c803dc..43cfd24 100755
+--- a/Configure
++++ b/Configure
+@@ -136,7 +136,7 @@ my $alpha_asm="alphacpuid.o:bn_asm.o alpha-mont.o:::::sha1-alpha.o:::::::ghash-a
+ my $mips32_asm=":bn-mips.o::aes_cbc.o aes-mips.o:::sha1-mips.o sha256-mips.o::::::::";
+ my $mips64_asm=":bn-mips.o mips-mont.o::aes_cbc.o aes-mips.o:::sha1-mips.o sha256-mips.o sha512-mips.o::::::::";
+ my $s390x_asm="s390xcap.o s390xcpuid.o:bn-s390x.o s390x-mont.o s390x-gf2m.o::aes-s390x.o aes-ctr.o aes-xts.o:::sha1-s390x.o sha256-s390x.o sha512-s390x.o::rc4-s390x.o:::::ghash-s390x.o:";
+-my $armv4_asm="armcap.o armv4cpuid.o:bn_asm.o armv4-mont.o armv4-gf2m.o::aes_cbc.o aes-armv4.o:::sha1-armv4-large.o sha256-armv4.o sha512-armv4.o:::::::ghash-armv4.o::void";
++my $armv4_asm="armcap.o armv4cpuid.o:bn_asm.o armv4-mont.o armv4-gf2m.o::aes_cbc.o aes-armv4.o bsaes-armv7.o:::sha1-armv4-large.o sha256-armv4.o sha512-armv4.o:::::::ghash-armv4.o::void";
+ my $parisc11_asm="pariscid.o:bn_asm.o parisc-mont.o::aes_core.o aes_cbc.o aes-parisc.o:::sha1-parisc.o sha256-parisc.o sha512-parisc.o::rc4-parisc.o:::::ghash-parisc.o::32";
+ my $parisc20_asm="pariscid.o:pa-risc2W.o parisc-mont.o::aes_core.o aes_cbc.o aes-parisc.o:::sha1-parisc.o sha256-parisc.o sha512-parisc.o::rc4-parisc.o:::::ghash-parisc.o::64";
+ my $ppc32_asm="ppccpuid.o ppccap.o:bn-ppc.o ppc-mont.o ppc64-mont.o::aes_core.o aes_cbc.o aes-ppc.o:::sha1-ppc.o sha256-ppc.o::::::::";
+diff --git a/crypto/aes/Makefile b/crypto/aes/Makefile
+index 45ede0a..9f149fb 100644
+--- a/crypto/aes/Makefile
++++ b/crypto/aes/Makefile
+@@ -81,6 +81,8 @@ aes-mips.S:	asm/aes-mips.pl
+ # GNU make "catch all"
+ aes-%.S:	asm/aes-%.pl;	$(PERL) $< $(PERLASM_SCHEME) > $@
+ aes-armv4.o:	aes-armv4.S
++bsaes-%.S:	asm/bsaes-%.pl;	$(PERL) $< $(PERLASM_SCHEME) $@
++bsaes-armv7.o:	bsaes-armv7.S
+ 
+ files:
+ 	$(PERL) $(TOP)/util/files.pl Makefile >> $(TOP)/MINFO
+diff --git a/crypto/aes/asm/bsaes-armv7.pl b/crypto/aes/asm/bsaes-armv7.pl
+index d901c58..71aae8d 100644
+--- a/crypto/aes/asm/bsaes-armv7.pl
++++ b/crypto/aes/asm/bsaes-armv7.pl
+@@ -26,6 +26,9 @@
+ # which is [much] worse than anticipated (for further details see
+ # http://www.openssl.org/~appro/Snapdragon-S4.html).
+ #
++# Cortex-A15 manages in 14.2/19.6 cycles [when integer-only code
++# manages in 20.0 cycles].
++#
+ # When comparing to x86_64 results keep in mind that NEON unit is
+ # [mostly] single-issue and thus can't [fully] benefit from
+ # instruction-level parallelism. And when comparing to aes-armv4
+@@ -617,6 +620,9 @@ ___
+ }
+ 
+ $code.=<<___;
++#include "arm_arch.h"
++
++#if __ARM_ARCH__>=7
+ .text
+ .code	32
+ .fpu	neon
+@@ -975,6 +981,9 @@ bsaes_decrypt_128:
+ .size	bsaes_decrypt_128,.-bsaes_decrypt_128
+ ___
+ }
++$code.=<<___;
++#endif
++___
+ 
+ $code =~ s/\`([^\`]*)\`/eval($1)/gem;
+ 
+-- 
+1.8.3.1
+
diff --git a/meta/recipes-connectivity/openssl/openssl-1.0.1e/0008-bsaes-armv7.pl-add-bsaes_cbc_encrypt-and-bsaes_ctr32.patch b/meta/recipes-connectivity/openssl/openssl-1.0.1e/0008-bsaes-armv7.pl-add-bsaes_cbc_encrypt-and-bsaes_ctr32.patch
new file mode 100644
index 0000000..6f157c5
--- /dev/null
+++ b/meta/recipes-connectivity/openssl/openssl-1.0.1e/0008-bsaes-armv7.pl-add-bsaes_cbc_encrypt-and-bsaes_ctr32.patch
@@ -0,0 +1,517 @@
+From 8ace0c9b71f15c3071c9cf05191431320bdd1673 Mon Sep 17 00:00:00 2001
+From: Andy Polyakov <appro@openssl.org>
+Date: Tue, 23 Apr 2013 17:52:14 +0200
+Subject: [PATCH 08/15] bsaes-armv7.pl: add bsaes_cbc_encrypt and
+ bsaes_ctr32_encrypt_blocks.
+
+Submitted by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
+
+Contributor claims ~50% improvement in CTR and ~9% in CBC decrypt
+on Cortex-A15.
+
+Upstream-Status: Backport
+
+---
+ crypto/aes/asm/bsaes-armv7.pl | 431 +++++++++++++++++++++++++++++++++++++++++-
+ crypto/evp/e_aes.c            |  10 +
+ 2 files changed, 440 insertions(+), 1 deletion(-)
+
+diff --git a/crypto/aes/asm/bsaes-armv7.pl b/crypto/aes/asm/bsaes-armv7.pl
+index 71aae8d..b350b32 100644
+--- a/crypto/aes/asm/bsaes-armv7.pl
++++ b/crypto/aes/asm/bsaes-armv7.pl
+@@ -715,6 +715,8 @@ _bsaes_const:
+ 	.quad	0x0304090e00050a0f, 0x01060b0c0207080d
+ .LM0:
+ 	.quad	0x02060a0e03070b0f, 0x0004080c0105090d
++.LREVM0SR:
++	.quad	0x090d02060c030708, 0x00040b0f050a0e01
+ .asciz	"Bit-sliced AES for NEON, CRYPTOGAMS by <appro\@openssl.org>"
+ .align	6
+ .size	_bsaes_const,.-_bsaes_const
+@@ -727,6 +729,7 @@ _bsaes_encrypt8:
+ 	sub	$const,$const,#_bsaes_encrypt8-.LM0SR
+ 
+ 	vldmia	$const!, {@XMM[8]}		@ .LM0SR
++_bsaes_encrypt8_alt:
+ 	veor	@XMM[10], @XMM[0], @XMM[9]	@ xor with round0 key
+ 	veor	@XMM[11], @XMM[1], @XMM[9]
+ 	 vtbl.8	`&Dlo(@XMM[0])`, {@XMM[10]}, `&Dlo(@XMM[8])`
+@@ -879,7 +882,7 @@ _bsaes_key_convert:
+ ___
+ }
+ 
+-if (1) {		# following four functions are unsupported interface
++if (0) {		# following four functions are unsupported interface
+ 			# used for benchmarking...
+ $code.=<<___;
+ .globl	bsaes_enc_key_convert
+@@ -981,6 +984,432 @@ bsaes_decrypt_128:
+ .size	bsaes_decrypt_128,.-bsaes_decrypt_128
+ ___
+ }
++{
++my ($inp,$out,$len,$key, $ivp,$fp,$rounds)=map("r$_",(0..3,8..10));
++my ($keysched)=("sp");
++
++$code.=<<___;
++.extern AES_cbc_encrypt
++.extern AES_decrypt
++
++.global	bsaes_cbc_encrypt
++.type	bsaes_cbc_encrypt,%function
++.align	5
++bsaes_cbc_encrypt:
++	cmp	$len, #128
++	blo	AES_cbc_encrypt
++
++	@ it is up to the caller to make sure we are called with enc == 0
++
++	stmdb	sp!, {r4-r10, lr}
++	vstmdb	sp!, {d8-d15}			@ ABI specification says so
++	ldr	$ivp, [sp, #0x60]		@ IV is 1st arg on the stack
++	mov	$len, $len, lsr#4		@ len in 16 byte blocks
++	sub	sp, #0x10			@ scratch space to carry over the IV
++	mov	$fp, sp				@ save sp
++
++	@ allocate the key schedule on the stack
++	ldr	$rounds, [$key, #240]		@ get # of rounds
++	sub	sp, sp, $rounds, lsl#7		@ 128 bytes per inner round key
++	add	sp, sp, #`128-32`		@ size of bit-sliced key schedule
++
++	@ populate the key schedule
++	mov	r4, $key			@ pass key
++	mov	r5, $rounds			@ pass # of rounds
++	mov	r12, $keysched			@ pass key schedule
++	bl	_bsaes_key_convert
++	vldmia	$keysched, {@XMM[6]}
++	vstmia	r12,  {@XMM[15]}		@ save last round key
++	veor	@XMM[7], @XMM[7], @XMM[6]	@ fix up round 0 key
++	vstmia	$keysched, {@XMM[7]}
++
++	vld1.8	{@XMM[15]}, [$ivp]		@ load IV
++	b	.Lcbc_dec_loop
++
++.align	4
++.Lcbc_dec_loop:
++	subs	$len, $len, #0x8
++	bmi	.Lcbc_dec_loop_finish
++
++	vld1.8	{@XMM[0]-@XMM[1]}, [$inp]!	@ load input
++	vld1.8	{@XMM[2]-@XMM[3]}, [$inp]!
++	mov	r4, $keysched			@ pass the key
++	vld1.8	{@XMM[4]-@XMM[5]}, [$inp]!
++	mov	r5, $rounds
++	vld1.8	{@XMM[6]-@XMM[7]}, [$inp]
++	sub	$inp, $inp, #0x60
++	vstmia	$fp, {@XMM[15]}			@ put aside IV
++
++	bl	_bsaes_decrypt8
++
++	vldmia	$fp, {@XMM[14]}			@ reload IV
++	vld1.8	{@XMM[8]-@XMM[9]}, [$inp]!	@ reload input
++	veor	@XMM[0], @XMM[0], @XMM[14]	@ ^= IV
++	vld1.8	{@XMM[10]-@XMM[11]}, [$inp]!
++	veor	@XMM[1], @XMM[1], @XMM[8]
++	veor	@XMM[6], @XMM[6], @XMM[9]
++	vld1.8	{@XMM[12]-@XMM[13]}, [$inp]!
++	veor	@XMM[4], @XMM[4], @XMM[10]
++	veor	@XMM[2], @XMM[2], @XMM[11]
++	vld1.8	{@XMM[14]-@XMM[15]}, [$inp]!
++	veor	@XMM[7], @XMM[7], @XMM[12]
++	vst1.8	{@XMM[0]-@XMM[1]}, [$out]!	@ write output
++	veor	@XMM[3], @XMM[3], @XMM[13]
++	vst1.8	{@XMM[6]}, [$out]!
++	veor	@XMM[5], @XMM[5], @XMM[14]
++	vst1.8	{@XMM[4]}, [$out]!
++	vst1.8	{@XMM[2]}, [$out]!
++	vst1.8	{@XMM[7]}, [$out]!
++	vst1.8	{@XMM[3]}, [$out]!
++	vst1.8	{@XMM[5]}, [$out]!
++
++	b	.Lcbc_dec_loop
++
++.Lcbc_dec_loop_finish:
++	adds	$len, $len, #8
++	beq	.Lcbc_dec_done
++
++	vld1.8	{@XMM[0]}, [$inp]!		@ load input
++	cmp	$len, #2
++	blo	.Lcbc_dec_one
++	vld1.8	{@XMM[1]}, [$inp]!
++	mov	r4, $keysched			@ pass the key
++	mov	r5, $rounds
++	vstmia	$fp, {@XMM[15]}			@ put aside IV
++	beq	.Lcbc_dec_two
++	vld1.8	{@XMM[2]}, [$inp]!
++	cmp	$len, #4
++	blo	.Lcbc_dec_three
++	vld1.8	{@XMM[3]}, [$inp]!
++	beq	.Lcbc_dec_four
++	vld1.8	{@XMM[4]}, [$inp]!
++	cmp	$len, #6
++	blo	.Lcbc_dec_five
++	vld1.8	{@XMM[5]}, [$inp]!
++	beq	.Lcbc_dec_six
++	vld1.8	{@XMM[6]}, [$inp]!
++	sub	$inp, $inp, #0x70
++
++	bl	_bsaes_decrypt8
++
++	vldmia	$fp, {@XMM[14]}			@ reload IV
++	vld1.8	{@XMM[8]-@XMM[9]}, [$inp]!	@ reload input
++	veor	@XMM[0], @XMM[0], @XMM[14]	@ ^= IV
++	vld1.8	{@XMM[10]-@XMM[11]}, [$inp]!
++	veor	@XMM[1], @XMM[1], @XMM[8]
++	veor	@XMM[6], @XMM[6], @XMM[9]
++	vld1.8	{@XMM[12]-@XMM[13]}, [$inp]!
++	veor	@XMM[4], @XMM[4], @XMM[10]
++	veor	@XMM[2], @XMM[2], @XMM[11]
++	vld1.8	{@XMM[15]}, [$inp]!
++	veor	@XMM[7], @XMM[7], @XMM[12]
++	vst1.8	{@XMM[0]-@XMM[1]}, [$out]!	@ write output
++	veor	@XMM[3], @XMM[3], @XMM[13]
++	vst1.8	{@XMM[6]}, [$out]!
++	vst1.8	{@XMM[4]}, [$out]!
++	vst1.8	{@XMM[2]}, [$out]!
++	vst1.8	{@XMM[7]}, [$out]!
++	vst1.8	{@XMM[3]}, [$out]!
++	b	.Lcbc_dec_done
++.align	4
++.Lcbc_dec_six:
++	sub	$inp, $inp, #0x60
++	bl	_bsaes_decrypt8
++	vldmia	$fp,{@XMM[14]}			@ reload IV
++	vld1.8	{@XMM[8]-@XMM[9]}, [$inp]!	@ reload input
++	veor	@XMM[0], @XMM[0], @XMM[14]	@ ^= IV
++	vld1.8	{@XMM[10]-@XMM[11]}, [$inp]!
++	veor	@XMM[1], @XMM[1], @XMM[8]
++	veor	@XMM[6], @XMM[6], @XMM[9]
++	vld1.8	{@XMM[12]}, [$inp]!
++	veor	@XMM[4], @XMM[4], @XMM[10]
++	veor	@XMM[2], @XMM[2], @XMM[11]
++	vld1.8	{@XMM[15]}, [$inp]!
++	veor	@XMM[7], @XMM[7], @XMM[12]
++	vst1.8	{@XMM[0]-@XMM[1]}, [$out]!	@ write output
++	vst1.8	{@XMM[6]}, [$out]!
++	vst1.8	{@XMM[4]}, [$out]!
++	vst1.8	{@XMM[2]}, [$out]!
++	vst1.8	{@XMM[7]}, [$out]!
++	b	.Lcbc_dec_done
++.align	4
++.Lcbc_dec_five:
++	sub	$inp, $inp, #0x50
++	bl	_bsaes_decrypt8
++	vldmia	$fp, {@XMM[14]}			@ reload IV
++	vld1.8	{@XMM[8]-@XMM[9]}, [$inp]!	@ reload input
++	veor	@XMM[0], @XMM[0], @XMM[14]	@ ^= IV
++	vld1.8	{@XMM[10]-@XMM[11]}, [$inp]!
++	veor	@XMM[1], @XMM[1], @XMM[8]
++	veor	@XMM[6], @XMM[6], @XMM[9]
++	vld1.8	{@XMM[15]}, [$inp]!
++	veor	@XMM[4], @XMM[4], @XMM[10]
++	vst1.8	{@XMM[0]-@XMM[1]}, [$out]!	@ write output
++	veor	@XMM[2], @XMM[2], @XMM[11]
++	vst1.8	{@XMM[6]}, [$out]!
++	vst1.8	{@XMM[4]}, [$out]!
++	vst1.8	{@XMM[2]}, [$out]!
++	b	.Lcbc_dec_done
++.align	4
++.Lcbc_dec_four:
++	sub	$inp, $inp, #0x40
++	bl	_bsaes_decrypt8
++	vldmia	$fp, {@XMM[14]}			@ reload IV
++	vld1.8	{@XMM[8]-@XMM[9]}, [$inp]!	@ reload input
++	veor	@XMM[0], @XMM[0], @XMM[14]	@ ^= IV
++	vld1.8	{@XMM[10]}, [$inp]!
++	veor	@XMM[1], @XMM[1], @XMM[8]
++	veor	@XMM[6], @XMM[6], @XMM[9]
++	vld1.8	{@XMM[15]}, [$inp]!
++	veor	@XMM[4], @XMM[4], @XMM[10]
++	vst1.8	{@XMM[0]-@XMM[1]}, [$out]!	@ write output
++	vst1.8	{@XMM[6]}, [$out]!
++	vst1.8	{@XMM[4]}, [$out]!
++	b	.Lcbc_dec_done
++.align	4
++.Lcbc_dec_three:
++	sub	$inp, $inp, #0x30
++	bl	_bsaes_decrypt8
++	vldmia	$fp, {@XMM[14]}			@ reload IV
++	vld1.8	{@XMM[8]-@XMM[9]}, [$inp]!	@ reload input
++	veor	@XMM[0], @XMM[0], @XMM[14]	@ ^= IV
++	vld1.8	{@XMM[15]}, [$inp]!
++	veor	@XMM[1], @XMM[1], @XMM[8]
++	veor	@XMM[6], @XMM[6], @XMM[9]
++	vst1.8	{@XMM[0]-@XMM[1]}, [$out]!	@ write output
++	vst1.8	{@XMM[6]}, [$out]!
++	b	.Lcbc_dec_done
++.align	4
++.Lcbc_dec_two:
++	sub	$inp, $inp, #0x20
++	bl	_bsaes_decrypt8
++	vldmia	$fp, {@XMM[14]}			@ reload IV
++	vld1.8	{@XMM[8]}, [$inp]!		@ reload input
++	veor	@XMM[0], @XMM[0], @XMM[14]	@ ^= IV
++	vld1.8	{@XMM[15]}, [$inp]!		@ reload input
++	veor	@XMM[1], @XMM[1], @XMM[8]
++	vst1.8	{@XMM[0]-@XMM[1]}, [$out]!	@ write output
++	b	.Lcbc_dec_done
++.align	4
++.Lcbc_dec_one:
++	sub	$inp, $inp, #0x10
++	mov	$rounds, $out			@ save original out pointer
++	mov	$out, $fp			@ use the iv scratch space as out buffer
++	mov	r2, $key
++	vmov	@XMM[4],@XMM[15]		@ just in case ensure that IV
++	vmov	@XMM[5],@XMM[0]			@ and input are preserved
++	bl	AES_decrypt
++	vld1.8	{@XMM[0]}, [$fp,:64]		@ load result
++	veor	@XMM[0], @XMM[0], @XMM[4]	@ ^= IV
++	vmov	@XMM[15], @XMM[5]		@ @XMM[5] holds input
++	vst1.8	{@XMM[0]}, [$rounds]		@ write output
++
++.Lcbc_dec_done:
++	vmov.i32	q0, #0
++	vmov.i32	q1, #0
++.Lcbc_dec_bzero:				@ wipe key schedule [if any]
++	vstmia		$keysched!, {q0-q1}
++	teq		$keysched, $fp
++	bne		.Lcbc_dec_bzero
++
++	add	sp, $fp, #0x10
++	vst1.8	{@XMM[15]}, [$ivp]		@ return IV
++	vldmia	sp!, {d8-d15}
++	ldmia	sp!, {r4-r10, pc}
++.size	bsaes_cbc_encrypt,.-bsaes_cbc_encrypt
++___
++}
++{
++my ($inp,$out,$len,$key, $ctr,$fp,$rounds)=(map("r$_",(0..3,8..10)));
++my $const = "r6";	# shared with _bsaes_encrypt8_alt
++my $keysched = "sp";
++
++$code.=<<___;
++.extern	AES_encrypt
++.global	bsaes_ctr32_encrypt_blocks
++.type	bsaes_ctr32_encrypt_blocks,%function
++.align	5
++bsaes_ctr32_encrypt_blocks:
++	cmp	$len, #8			@ use plain AES for
++	blo	.Lctr_enc_short			@ small sizes
++
++	stmdb	sp!, {r4-r10, lr}
++	vstmdb	sp!, {d8-d15}			@ ABI specification says so
++	ldr	$ctr, [sp, #0x60]		@ ctr is 1st arg on the stack
++	sub	sp, sp, #0x10			@ scratch space to carry over the ctr
++	mov	$fp, sp				@ save sp
++
++	@ allocate the key schedule on the stack
++	ldr	$rounds, [$key, #240]		@ get # of rounds
++	sub	sp, sp, $rounds, lsl#7		@ 128 bytes per inner round key
++	add	sp, sp, #`128-32`		@ size of bit-sliced key schedule
++
++	@ populate the key schedule
++	mov	r4, $key			@ pass key
++	mov	r5, $rounds			@ pass # of rounds
++	mov	r12, $keysched			@ pass key schedule
++	bl	_bsaes_key_convert
++	veor	@XMM[7],@XMM[7],@XMM[15]	@ fix up last round key
++	vstmia	r12, {@XMM[7]}			@ save last round key
++
++	vld1.8	{@XMM[0]}, [$ctr]		@ load counter
++	add	$ctr, $const, #.LREVM0SR-.LM0	@ borrow $ctr
++	vldmia	$keysched, {@XMM[4]}		@ load round0 key
++
++	vmov.i32	`&Dhi("@XMM[8]")`,#1	@ compose 1<<96
++	vmov.i32	`&Dlo("@XMM[8]")`,#0
++	vrev32.8	`&Dhi("@XMM[0]")`,`&Dhi("@XMM[0]")`
++	vshl.u64	`&Dhi("@XMM[8]")`,#32
++	vrev32.8	`&Dhi("@XMM[4]")`,`&Dhi("@XMM[4]")`
++	vadd.u32	@XMM[9],@XMM[8],@XMM[8]	@ compose 2<<96
++	vstmia	$keysched, {@XMM[4]}		@ save adjusted round0 key
++	b	.Lctr_enc_loop
++
++.align	4
++.Lctr_enc_loop:
++	vadd.u32	@XMM[10], @XMM[8], @XMM[9]	@ compose 3<<96
++	vadd.u32	@XMM[1], @XMM[0], @XMM[8]	@ +1
++	vadd.u32	@XMM[2], @XMM[0], @XMM[9]	@ +2
++	vadd.u32	@XMM[3], @XMM[0], @XMM[10]	@ +3
++	vadd.u32	@XMM[4], @XMM[1], @XMM[10]
++	vadd.u32	@XMM[5], @XMM[2], @XMM[10]
++	vadd.u32	@XMM[6], @XMM[3], @XMM[10]
++	vadd.u32	@XMM[7], @XMM[4], @XMM[10]
++	vadd.u32	@XMM[10], @XMM[5], @XMM[10]	@ next counter
++
++	@ Borrow prologue from _bsaes_encrypt8 to use the opportunity
++	@ to flip byte order in 32-bit counter
++
++	vldmia		$keysched, {@XMM[9]}		@ load round0 key
++	add		r4, $keysched, #0x10		@ pass next round key
++	vldmia		$ctr, {@XMM[8]}			@ .LREVM0SR
++	mov		r5, $rounds			@ pass rounds
++	vstmia		$fp, {@XMM[10]}			@ save next counter
++	sub		$const, $ctr, #.LREVM0SR-.LSR	@ pass constants
++
++	bl		_bsaes_encrypt8_alt
++
++	subs		$len, $len, #8
++	blo		.Lctr_enc_loop_done
++
++	vld1.8		{@XMM[8]-@XMM[9]}, [$inp]!	@ load input
++	vld1.8		{@XMM[10]-@XMM[11]}, [$inp]!
++	veor		@XMM[0], @XMM[8]
++	veor		@XMM[1], @XMM[9]
++	vld1.8		{@XMM[12]-@XMM[13]}, [$inp]!
++	veor		@XMM[4], @XMM[10]
++	veor		@XMM[6], @XMM[11]
++	vld1.8		{@XMM[14]-@XMM[15]}, [$inp]!
++	veor		@XMM[3], @XMM[12]
++	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!	@ write output
++	veor		@XMM[7], @XMM[13]
++	veor		@XMM[2], @XMM[14]
++	vst1.8		{@XMM[4]}, [$out]!
++	veor		@XMM[5], @XMM[15]
++	vst1.8		{@XMM[6]}, [$out]!
++	vmov.i32	`&Dhi("@XMM[8]")`,#1		@ compose 1<<96
++	vst1.8		{@XMM[3]}, [$out]!
++	vmov.i32	`&Dlo("@XMM[8]")`,#0
++	vst1.8		{@XMM[7]}, [$out]!
++	vshl.u64	`&Dhi("@XMM[8]")`,#32
++	vst1.8		{@XMM[2]}, [$out]!
++	vadd.u32	@XMM[9],@XMM[8],@XMM[8]		@ compose 2<<96
++	vst1.8		{@XMM[5]}, [$out]!
++	vldmia		$fp, {@XMM[0]}			@ load counter
++
++	bne		.Lctr_enc_loop
++	b		.Lctr_enc_done
++
++.align	4
++.Lctr_enc_loop_done:
++	add		$len, $len, #8
++	vld1.8		{@XMM[8]}, [$inp]!	@ load input
++	veor		@XMM[0], @XMM[8]
++	vst1.8		{@XMM[0]}, [$out]!	@ write output
++	cmp		$len, #2
++	blo		.Lctr_enc_done
++	vld1.8		{@XMM[9]}, [$inp]!
++	veor		@XMM[1], @XMM[9]
++	vst1.8		{@XMM[1]}, [$out]!
++	beq		.Lctr_enc_done
++	vld1.8		{@XMM[10]}, [$inp]!
++	veor		@XMM[4], @XMM[10]
++	vst1.8		{@XMM[4]}, [$out]!
++	cmp		$len, #4
++	blo		.Lctr_enc_done
++	vld1.8		{@XMM[11]}, [$inp]!
++	veor		@XMM[6], @XMM[11]
++	vst1.8		{@XMM[6]}, [$out]!
++	beq		.Lctr_enc_done
++	vld1.8		{@XMM[12]}, [$inp]!
++	veor		@XMM[3], @XMM[12]
++	vst1.8		{@XMM[3]}, [$out]!
++	cmp		$len, #6
++	blo		.Lctr_enc_done
++	vld1.8		{@XMM[13]}, [$inp]!
++	veor		@XMM[7], @XMM[13]
++	vst1.8		{@XMM[7]}, [$out]!
++	beq		.Lctr_enc_done
++	vld1.8		{@XMM[14]}, [$inp]
++	veor		@XMM[2], @XMM[14]
++	vst1.8		{@XMM[2]}, [$out]!
++
++.Lctr_enc_done:
++	vmov.i32	q0, #0
++	vmov.i32	q1, #0
++.Lctr_enc_bzero:			@ wipe key schedule [if any]
++	vstmia		$keysched!, {q0-q1}
++	teq		$keysched, $fp
++	bne		.Lctr_enc_bzero
++
++	add	sp, $fp, #0x10
++	vldmia	sp!, {d8-d15}
++	ldmia	sp!, {r4-r10, pc}	@ return
++
++.align	4
++.Lctr_enc_short:
++	ldr	ip, [sp]		@ ctr pointer is passed on stack
++	stmdb	sp!, {r4-r8, lr}
++
++	mov	r4, $inp		@ copy arguments
++	mov	r5, $out
++	mov	r6, $len
++	mov	r7, $key
++	ldr	r8, [ip, #12]		@ load counter LSW
++	vld1.8	{@XMM[1]}, [ip]		@ load whole counter value
++#ifdef __ARMEL__
++	rev	r8, r8
++#endif
++	sub	sp, sp, #0x10
++	vst1.8	{@XMM[1]}, [sp,:64]	@ copy counter value
++	sub	sp, sp, #0x10
++
++.Lctr_enc_short_loop:
++	add	r0, sp, #0x10		@ input counter value
++	mov	r1, sp			@ output on the stack
++	mov	r2, r7			@ key
++
++	bl	AES_encrypt
++
++	vld1.8	{@XMM[0]}, [r4]!	@ load input
++	vld1.8	{@XMM[1]}, [sp,:64]	@ load encrypted counter
++	add	r8, r8, #1
++#ifdef __ARMEL__
++	rev	r0, r8
++	str	r0, [sp, #0x1c]		@ next counter value
++#else
++	str	r8, [sp, #0x1c]		@ next counter value
++#endif
++	veor	@XMM[0],@XMM[0],@XMM[1]
++	vst1.8	{@XMM[0]}, [r5]!	@ store output
++	subs	r6, r6, #1
++	bne	.Lctr_enc_short_loop
++
++	add	sp, sp, #0x20
++	ldmia	sp!, {r4-r8, pc}
++.size	bsaes_ctr32_encrypt_blocks,.-bsaes_ctr32_encrypt_blocks
++___
++}
+ $code.=<<___;
+ #endif
+ ___
+diff --git a/crypto/evp/e_aes.c b/crypto/evp/e_aes.c
+index 1bfb5d9..f38a736 100644
+--- a/crypto/evp/e_aes.c
++++ b/crypto/evp/e_aes.c
+@@ -482,6 +482,14 @@ static const EVP_CIPHER aes_##keylen##_##mode = { \
+ 	NULL,NULL,aes_##mode##_ctrl,NULL }; \
+ const EVP_CIPHER *EVP_aes_##keylen##_##mode(void) \
+ { return &aes_##keylen##_##mode; }
++
++#endif
++
++#if defined(AES_ASM) && defined(BSAES_ASM) && (defined(__arm__) || defined(__arm))
++#include "arm_arch.h"
++#if __ARM_ARCH__>=7
++#define BSAES_CAPABLE	(OPENSSL_armcap_P & ARMV7_NEON)
++#endif
+ #endif
+ 
+ #define BLOCK_CIPHER_generic_pack(nid,keylen,flags)		\
+@@ -1064,11 +1072,13 @@ static int aes_xts_init_key(EVP_CIPHER_CTX *ctx, const unsigned char *key,
+ 		xctx->stream = NULL;
+ #endif
+ 		/* key_len is two AES keys */
++#if !(defined(__arm__) || defined(__arm))	/* not yet? */
+ #ifdef BSAES_CAPABLE
+ 		if (BSAES_CAPABLE)
+ 			xctx->stream = enc ? bsaes_xts_encrypt : bsaes_xts_decrypt;
+ 		else
+ #endif
++#endif
+ #ifdef VPAES_CAPABLE
+ 		if (VPAES_CAPABLE)
+ 		    {
+-- 
+1.8.3.1
+
diff --git a/meta/recipes-connectivity/openssl/openssl-1.0.1e/0009-Added-support-for-ARM-NEON-based-bit-sliced-AES-in-X.patch b/meta/recipes-connectivity/openssl/openssl-1.0.1e/0009-Added-support-for-ARM-NEON-based-bit-sliced-AES-in-X.patch
new file mode 100644
index 0000000..259b080
--- /dev/null
+++ b/meta/recipes-connectivity/openssl/openssl-1.0.1e/0009-Added-support-for-ARM-NEON-based-bit-sliced-AES-in-X.patch
@@ -0,0 +1,774 @@
+From 709aa5272799dc43082528eb7393e2faccd69288 Mon Sep 17 00:00:00 2001
+From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
+Date: Mon, 5 Aug 2013 13:52:46 +0200
+Subject: [PATCH 09/15] Added support for ARM/NEON based bit sliced AES in XTS
+ mode
+
+Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
+
+Upstream-Status: Backport
+
+---
+ crypto/aes/asm/bsaes-armv7.pl | 720 ++++++++++++++++++++++++++++++++++++++++++
+ crypto/evp/e_aes.c            |   2 -
+ 2 files changed, 720 insertions(+), 2 deletions(-)
+
+diff --git a/crypto/aes/asm/bsaes-armv7.pl b/crypto/aes/asm/bsaes-armv7.pl
+index b350b32..9be80e5 100644
+--- a/crypto/aes/asm/bsaes-armv7.pl
++++ b/crypto/aes/asm/bsaes-armv7.pl
+@@ -717,6 +717,8 @@ _bsaes_const:
+ 	.quad	0x02060a0e03070b0f, 0x0004080c0105090d
+ .LREVM0SR:
+ 	.quad	0x090d02060c030708, 0x00040b0f050a0e01
++.Lxts_magic:
++	.long	1, 0, 0x87, 0
+ .asciz	"Bit-sliced AES for NEON, CRYPTOGAMS by <appro\@openssl.org>"
+ .align	6
+ .size	_bsaes_const,.-_bsaes_const
+@@ -1410,6 +1412,724 @@ bsaes_ctr32_encrypt_blocks:
+ .size	bsaes_ctr32_encrypt_blocks,.-bsaes_ctr32_encrypt_blocks
+ ___
+ }
++{
++######################################################################
++# void bsaes_xts_[en|de]crypt(const char *inp,char *out,size_t len,
++#	const AES_KEY *key1, const AES_KEY *key2,
++#	const unsigned char iv[16]);
++#
++my ($inp,$out,$len,$key,$rounds,$keysched,$magic,$fp)=(map("r$_",(7..11,1..3)));
++my $twmask=@XMM[5];
++my @T=@XMM[6..7];
++
++$code.=<<___;
++.globl	bsaes_xts_encrypt
++.type	bsaes_xts_encrypt,%function
++.align	4
++bsaes_xts_encrypt:
++	stmdb	sp!, {r4-r11, lr}		@ 0x24
++	vstmdb	sp!, {d8-d15}			@ 0x40
++	sub	sp, #0x14			@ 0x14
++
++	mov	$inp, r0
++	mov	$out, r1
++	mov	$len, r2
++	mov	$key, r3
++
++	@ generate initial tweak
++	ldr	r0, [sp, #0x7c]			@ iv[]
++	mov	r1, sp
++	ldr	r2, [sp, #0x78]			@ key2
++	bl	AES_encrypt
++
++	@ allocate the key schedule on the stack
++	ldr	$rounds, [$key, #240]		@ get # of rounds
++	mov	$fp, sp
++	sub	sp, sp, $rounds, lsl#7		@ 128 bytes per inner round key
++	add	sp, sp, #`128-32`		@ size of bit-sliced key schedule
++	mov	$keysched, sp
++
++	@ populate the key schedule
++	mov	r4, $key			@ pass key
++	mov	r5, $rounds			@ pass # of rounds
++	mov	r12, $keysched			@ pass key schedule
++	bl	_bsaes_key_convert
++	veor	@XMM[7], @XMM[7], @XMM[15]	@ fix up last round key
++	vstmia	r12, {@XMM[7]}			@ save last round key
++
++	sub	sp, #0x80			@ place for tweak[8]
++	bic	sp, #0x8			@ align at 16 bytes
++
++	vld1.8	{@XMM[8]}, [$fp]		@ initial tweak
++	adrl	$magic, .Lxts_magic
++
++	subs	$len, #0x80
++	blo	.Lxts_enc_short
++	b	.Lxts_enc_loop
++
++.align	4
++.Lxts_enc_loop:
++	vld1.8		{$twmask}, [$magic]	@ load XTS magic
++	vshr.s64	@T[0], @XMM[8], #63
++	mov		r0, sp
++	vand		@T[0], @T[0], $twmask
++___
++for($i=9;$i<16;$i++) {
++$code.=<<___;
++	vadd.u64	@XMM[$i], @XMM[$i-1], @XMM[$i-1]
++	vst1.8		{@XMM[$i-1]}, [r0,:128]!
++	vswp		`&Dhi("@T[0]")`,`&Dlo("@T[0]")`
++	vshr.s64	@T[1], @XMM[$i], #63
++	veor		@XMM[$i], @XMM[$i], @T[0]
++	vand		@T[1], @T[1], $twmask
++___
++	@T=reverse(@T);
++
++$code.=<<___ if ($i>=10);
++	vld1.8		{@XMM[$i-10]}, [$inp]!
++___
++$code.=<<___ if ($i>=11);
++	veor		@XMM[$i-11], @XMM[$i-11], @XMM[$i-3]
++___
++}
++$code.=<<___;
++	vadd.u64	@XMM[8], @XMM[15], @XMM[15]
++	vst1.8		{@XMM[15]}, [r0,:128]
++	vswp		`&Dhi("@T[0]")`,`&Dlo("@T[0]")`
++	veor		@XMM[8], @XMM[8], @T[0]
++	vst1.8		{@XMM[8]}, [$fp]		@ next round tweak
++
++	vld1.8		{@XMM[6]-@XMM[7]}, [$inp]!
++	veor		@XMM[5], @XMM[5], @XMM[13]
++	mov		r4, $keysched
++	veor		@XMM[6], @XMM[6], @XMM[14]
++	mov		r5, $rounds			@ pass rounds
++	veor		@XMM[7], @XMM[7], @XMM[15]
++	mov		r0, sp
++
++	bl		_bsaes_encrypt8
++
++	vld1.8		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
++	vld1.8		{@XMM[10]-@XMM[11]}, [r0,:128]!
++	veor		@XMM[0], @XMM[0], @XMM[ 8]
++	vld1.8		{@XMM[12]-@XMM[13]}, [r0,:128]!
++	veor		@XMM[1], @XMM[1], @XMM[ 9]
++	veor		@XMM[8], @XMM[4], @XMM[10]
++	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!
++	veor		@XMM[9], @XMM[6], @XMM[11]
++	vld1.8		{@XMM[14]-@XMM[15]}, [r0,:128]!
++	veor		@XMM[10], @XMM[3], @XMM[12]
++	vst1.8		{@XMM[8]-@XMM[9]}, [$out]!
++	veor		@XMM[11], @XMM[7], @XMM[13]
++	veor		@XMM[12], @XMM[2], @XMM[14]
++	vst1.8		{@XMM[10]-@XMM[11]}, [$out]!
++	veor		@XMM[13], @XMM[5], @XMM[15]
++	vst1.8		{@XMM[12]-@XMM[13]}, [$out]!
++
++	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++
++	subs		$len, #0x80
++	bpl		.Lxts_enc_loop
++
++.Lxts_enc_short:
++	adds		$len, #0x70
++	bmi		.Lxts_enc_done
++
++	vld1.8		{$twmask}, [$magic]	@ load XTS magic
++	vshr.s64	@T[0], @XMM[8], #63
++	mov		r0, sp
++	vand		@T[0], @T[0], $twmask
++___
++for($i=9;$i<16;$i++) {
++$code.=<<___;
++	vadd.u64	@XMM[$i], @XMM[$i-1], @XMM[$i-1]
++	vst1.8		{@XMM[$i-1]}, [r0,:128]!
++	vswp		`&Dhi("@T[0]")`,`&Dlo("@T[0]")`
++	vshr.s64	@T[1], @XMM[$i], #63
++	veor		@XMM[$i], @XMM[$i], @T[0]
++	vand		@T[1], @T[1], $twmask
++___
++	@T=reverse(@T);
++
++$code.=<<___ if ($i>=10);
++	vld1.8		{@XMM[$i-10]}, [$inp]!
++	subs		$len, #0x10
++	bmi		.Lxts_enc_`$i-9`
++___
++$code.=<<___ if ($i>=11);
++	veor		@XMM[$i-11], @XMM[$i-11], @XMM[$i-3]
++___
++}
++$code.=<<___;
++	sub		$len, #0x10
++	vst1.8		{@XMM[15]}, [$fp]		@ next round tweak
++
++	vld1.8		{@XMM[6]}, [$inp]!
++	veor		@XMM[5], @XMM[5], @XMM[13]
++	mov		r4, $keysched
++	veor		@XMM[6], @XMM[6], @XMM[14]
++	mov		r5, $rounds			@ pass rounds
++	mov		r0, sp
++
++	bl		_bsaes_encrypt8
++
++	vld1.8		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
++	vld1.8		{@XMM[10]-@XMM[11]}, [r0,:128]!
++	veor		@XMM[0], @XMM[0], @XMM[ 8]
++	vld1.8		{@XMM[12]-@XMM[13]}, [r0,:128]!
++	veor		@XMM[1], @XMM[1], @XMM[ 9]
++	veor		@XMM[8], @XMM[4], @XMM[10]
++	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!
++	veor		@XMM[9], @XMM[6], @XMM[11]
++	vld1.8		{@XMM[14]}, [r0,:128]!
++	veor		@XMM[10], @XMM[3], @XMM[12]
++	vst1.8		{@XMM[8]-@XMM[9]}, [$out]!
++	veor		@XMM[11], @XMM[7], @XMM[13]
++	veor		@XMM[12], @XMM[2], @XMM[14]
++	vst1.8		{@XMM[10]-@XMM[11]}, [$out]!
++	vst1.8		{@XMM[12]}, [$out]!
++
++	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	b		.Lxts_enc_done
++.Lxts_enc_6:
++	vst1.8		{@XMM[14]}, [$fp]		@ next round tweak
++
++	veor		@XMM[4], @XMM[4], @XMM[12]
++	mov		r4, $keysched
++	veor		@XMM[5], @XMM[5], @XMM[13]
++	mov		r5, $rounds			@ pass rounds
++	mov		r0, sp
++
++	bl		_bsaes_encrypt8
++
++	vld1.8		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
++	vld1.8		{@XMM[10]-@XMM[11]}, [r0,:128]!
++	veor		@XMM[0], @XMM[0], @XMM[ 8]
++	vld1.8		{@XMM[12]-@XMM[13]}, [r0,:128]!
++	veor		@XMM[1], @XMM[1], @XMM[ 9]
++	veor		@XMM[8], @XMM[4], @XMM[10]
++	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!
++	veor		@XMM[9], @XMM[6], @XMM[11]
++	veor		@XMM[10], @XMM[3], @XMM[12]
++	vst1.8		{@XMM[8]-@XMM[9]}, [$out]!
++	veor		@XMM[11], @XMM[7], @XMM[13]
++	vst1.8		{@XMM[10]-@XMM[11]}, [$out]!
++
++	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	b		.Lxts_enc_done
++.Lxts_enc_5:
++	vst1.8		{@XMM[13]}, [$fp]		@ next round tweak
++
++	veor		@XMM[3], @XMM[3], @XMM[11]
++	mov		r4, $keysched
++	veor		@XMM[4], @XMM[4], @XMM[12]
++	mov		r5, $rounds			@ pass rounds
++	mov		r0, sp
++
++	bl		_bsaes_encrypt8
++
++	vld1.8		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
++	vld1.8		{@XMM[10]-@XMM[11]}, [r0,:128]!
++	veor		@XMM[0], @XMM[0], @XMM[ 8]
++	vld1.8		{@XMM[12]}, [r0,:128]!
++	veor		@XMM[1], @XMM[1], @XMM[ 9]
++	veor		@XMM[8], @XMM[4], @XMM[10]
++	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!
++	veor		@XMM[9], @XMM[6], @XMM[11]
++	veor		@XMM[10], @XMM[3], @XMM[12]
++	vst1.8		{@XMM[8]-@XMM[9]}, [$out]!
++	vst1.8		{@XMM[10]}, [$out]!
++
++	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	b		.Lxts_enc_done
++.Lxts_enc_4:
++	vst1.8		{@XMM[12]}, [$fp]		@ next round tweak
++
++	veor		@XMM[2], @XMM[2], @XMM[10]
++	mov		r4, $keysched
++	veor		@XMM[3], @XMM[3], @XMM[11]
++	mov		r5, $rounds			@ pass rounds
++	mov		r0, sp
++
++	bl		_bsaes_encrypt8
++
++	vld1.8		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
++	vld1.8		{@XMM[10]-@XMM[11]}, [r0,:128]!
++	veor		@XMM[0], @XMM[0], @XMM[ 8]
++	veor		@XMM[1], @XMM[1], @XMM[ 9]
++	veor		@XMM[8], @XMM[4], @XMM[10]
++	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!
++	veor		@XMM[9], @XMM[6], @XMM[11]
++	vst1.8		{@XMM[8]-@XMM[9]}, [$out]!
++
++	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	b		.Lxts_enc_done
++.Lxts_enc_3:
++	vst1.8		{@XMM[11]}, [$fp]		@ next round tweak
++
++	veor		@XMM[1], @XMM[1], @XMM[9]
++	mov		r4, $keysched
++	veor		@XMM[2], @XMM[2], @XMM[10]
++	mov		r5, $rounds			@ pass rounds
++	mov		r0, sp
++
++	bl		_bsaes_encrypt8
++
++	vld1.8		{@XMM[8]-@XMM[9]}, [r0,:128]!
++	vld1.8		{@XMM[10]}, [r0,:128]!
++	veor		@XMM[0], @XMM[0], @XMM[ 8]
++	veor		@XMM[1], @XMM[1], @XMM[ 9]
++	veor		@XMM[8], @XMM[4], @XMM[10]
++	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!
++	vst1.8		{@XMM[8]}, [$out]!
++
++	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	b		.Lxts_enc_done
++.Lxts_enc_2:
++	vst1.8		{@XMM[10]}, [$fp]		@ next round tweak
++
++	veor		@XMM[0], @XMM[0], @XMM[8]
++	mov		r4, $keysched
++	veor		@XMM[1], @XMM[1], @XMM[9]
++	mov		r5, $rounds			@ pass rounds
++	mov		r0, sp
++
++	bl		_bsaes_encrypt8
++
++	vld1.8		{@XMM[8]-@XMM[9]}, [r0,:128]!
++	veor		@XMM[0], @XMM[0], @XMM[ 8]
++	veor		@XMM[1], @XMM[1], @XMM[ 9]
++	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!
++
++	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	b		.Lxts_enc_done
++.Lxts_enc_1:
++	mov		r0, sp
++	veor		@XMM[0], @XMM[8]
++	mov		r1, sp
++	vst1.8		{@XMM[0]}, [sp,:128]
++	mov		r2, $key
++	mov		r4, $fp				@ preserve fp
++
++	bl		AES_encrypt
++
++	vld1.8		{@XMM[0]}, [sp,:128]
++	veor		@XMM[0], @XMM[0], @XMM[8]
++	vst1.8		{@XMM[0]}, [$out]!
++	mov		$fp, r4
++
++	vmov		@XMM[8], @XMM[9]		@ next round tweak
++
++.Lxts_enc_done:
++	adds		$len, #0x10
++	beq		.Lxts_enc_ret
++	sub		r6, $out, #0x10
++
++.Lxts_enc_steal:
++	ldrb		r0, [$inp], #1
++	ldrb		r1, [$out, #-0x10]
++	strb		r0, [$out, #-0x10]
++	strb		r1, [$out], #1
++
++	subs		$len, #1
++	bhi		.Lxts_enc_steal
++
++	vld1.8		{@XMM[0]}, [r6]
++	mov		r0, sp
++	veor		@XMM[0], @XMM[0], @XMM[8]
++	mov		r1, sp
++	vst1.8		{@XMM[0]}, [sp,:128]
++	mov		r2, $key
++	mov		r4, $fp			@ preserve fp
++
++	bl		AES_encrypt
++
++	vld1.8		{@XMM[0]}, [sp,:128]
++	veor		@XMM[0], @XMM[0], @XMM[8]
++	vst1.8		{@XMM[0]}, [r6]
++	mov		$fp, r4
++
++.Lxts_enc_ret:
++	vmov.i32	d0, #0
++.Lxts_enc_bzero:				@ wipe key schedule [if any]
++	vstmia		sp!, {d0}
++	teq		sp, $fp
++	bne		.Lxts_enc_bzero
++
++	add		sp, $fp, #0x14
++	vldmia		sp!, {d8-d15}
++	ldmia		sp!, {r4-r11, pc}	@ return
++
++.size	bsaes_xts_encrypt,.-bsaes_xts_encrypt
++
++.globl	bsaes_xts_decrypt
++.type	bsaes_xts_decrypt,%function
++.align	4
++bsaes_xts_decrypt:
++	stmdb	sp!, {r4-r11, lr}		@ 0x24
++	vstmdb	sp!, {d8-d15}			@ 0x40
++	sub	sp, #0x14			@ 0x14
++
++	mov	$inp, r0
++	mov	$out, r1
++	mov	$len, r2
++	mov	$key, r3
++
++	@ generate initial tweak
++	ldr	r0, [sp, #0x7c]			@ iv[]
++	mov	r1, sp
++	ldr	r2, [sp, #0x78]			@ key2
++	bl	AES_encrypt
++
++	@ allocate the key schedule on the stack
++	ldr	$rounds, [$key, #240]		@ get # of rounds
++	mov	$fp, sp
++	sub	sp, sp, $rounds, lsl#7		@ 128 bytes per inner round key
++	add	sp, sp, #`128-32`		@ size of bit-sliced key schedule
++	mov	$keysched, sp
++
++	@ populate the key schedule
++	mov	r4, $key			@ pass key
++	mov	r5, $rounds			@ pass # of rounds
++	mov	r12, $keysched			@ pass key schedule
++	bl	_bsaes_key_convert
++	vldmia	$keysched, {@XMM[6]}
++	vstmia	r12,  {@XMM[15]}		@ save last round key
++	veor	@XMM[7], @XMM[7], @XMM[6]	@ fix up round 0 key
++	vstmia	$keysched, {@XMM[7]}
++
++	sub	sp, #0x80			@ place for tweak[8]
++	bic	sp, #0x8			@ align at 16 bytes
++
++	vld1.8	{@XMM[8]}, [$fp]		@ initial tweak
++	adrl	$magic, .Lxts_magic
++
++	tst	$len, #0xf			@ if not multiple of 16
++	subne	$len, #0x10			@     subtract another 16 bytes
++	subs	$len, #0x80
++
++	blo	.Lxts_dec_short
++	b	.Lxts_dec_loop
++
++.align	4
++.Lxts_dec_loop:
++	vld1.8		{$twmask}, [$magic]	@ load XTS magic
++	vshr.s64	@T[0], @XMM[8], #63
++	mov		r0, sp
++	vand		@T[0], @T[0], $twmask
++___
++for($i=9;$i<16;$i++) {
++$code.=<<___;
++	vadd.u64	@XMM[$i], @XMM[$i-1], @XMM[$i-1]
++	vst1.8		{@XMM[$i-1]}, [r0,:128]!
++	vswp		`&Dhi("@T[0]")`,`&Dlo("@T[0]")`
++	vshr.s64	@T[1], @XMM[$i], #63
++	veor		@XMM[$i], @XMM[$i], @T[0]
++	vand		@T[1], @T[1], $twmask
++___
++	@T=reverse(@T);
++
++$code.=<<___ if ($i>=10);
++	vld1.8		{@XMM[$i-10]}, [$inp]!
++___
++$code.=<<___ if ($i>=11);
++	veor		@XMM[$i-11], @XMM[$i-11], @XMM[$i-3]
++___
++}
++$code.=<<___;
++	vadd.u64	@XMM[8], @XMM[15], @XMM[15]
++	vst1.8		{@XMM[15]}, [r0,:128]
++	vswp		`&Dhi("@T[0]")`,`&Dlo("@T[0]")`
++	veor		@XMM[8], @XMM[8], @T[0]
++	vst1.8		{@XMM[8]}, [$fp]		@ next round tweak
++
++	vld1.8		{@XMM[6]-@XMM[7]}, [$inp]!
++	veor		@XMM[5], @XMM[5], @XMM[13]
++	mov		r4, $keysched
++	veor		@XMM[6], @XMM[6], @XMM[14]
++	mov		r5, $rounds			@ pass rounds
++	veor		@XMM[7], @XMM[7], @XMM[15]
++	mov		r0, sp
++
++	bl		_bsaes_decrypt8
++
++	vld1.8		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
++	vld1.8		{@XMM[10]-@XMM[11]}, [r0,:128]!
++	veor		@XMM[0], @XMM[0], @XMM[ 8]
++	vld1.8		{@XMM[12]-@XMM[13]}, [r0,:128]!
++	veor		@XMM[1], @XMM[1], @XMM[ 9]
++	veor		@XMM[8], @XMM[6], @XMM[10]
++	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!
++	veor		@XMM[9], @XMM[4], @XMM[11]
++	vld1.8		{@XMM[14]-@XMM[15]}, [r0,:128]!
++	veor		@XMM[10], @XMM[2], @XMM[12]
++	vst1.8		{@XMM[8]-@XMM[9]}, [$out]!
++	veor		@XMM[11], @XMM[7], @XMM[13]
++	veor		@XMM[12], @XMM[3], @XMM[14]
++	vst1.8		{@XMM[10]-@XMM[11]}, [$out]!
++	veor		@XMM[13], @XMM[5], @XMM[15]
++	vst1.8		{@XMM[12]-@XMM[13]}, [$out]!
++
++	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++
++	subs		$len, #0x80
++	bpl		.Lxts_dec_loop
++
++.Lxts_dec_short:
++	adds		$len, #0x70
++	bmi		.Lxts_dec_done
++
++	vld1.8		{$twmask}, [$magic]	@ load XTS magic
++	vshr.s64	@T[0], @XMM[8], #63
++	mov		r0, sp
++	vand		@T[0], @T[0], $twmask
++___
++for($i=9;$i<16;$i++) {
++$code.=<<___;
++	vadd.u64	@XMM[$i], @XMM[$i-1], @XMM[$i-1]
++	vst1.8		{@XMM[$i-1]}, [r0,:128]!
++	vswp		`&Dhi("@T[0]")`,`&Dlo("@T[0]")`
++	vshr.s64	@T[1], @XMM[$i], #63
++	veor		@XMM[$i], @XMM[$i], @T[0]
++	vand		@T[1], @T[1], $twmask
++___
++	@T=reverse(@T);
++
++$code.=<<___ if ($i>=10);
++	vld1.8		{@XMM[$i-10]}, [$inp]!
++	subs		$len, #0x10
++	bmi		.Lxts_dec_`$i-9`
++___
++$code.=<<___ if ($i>=11);
++	veor		@XMM[$i-11], @XMM[$i-11], @XMM[$i-3]
++___
++}
++$code.=<<___;
++	sub		$len, #0x10
++	vst1.8		{@XMM[15]}, [$fp]		@ next round tweak
++
++	vld1.8		{@XMM[6]}, [$inp]!
++	veor		@XMM[5], @XMM[5], @XMM[13]
++	mov		r4, $keysched
++	veor		@XMM[6], @XMM[6], @XMM[14]
++	mov		r5, $rounds			@ pass rounds
++	mov		r0, sp
++
++	bl		_bsaes_decrypt8
++
++	vld1.8		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
++	vld1.8		{@XMM[10]-@XMM[11]}, [r0,:128]!
++	veor		@XMM[0], @XMM[0], @XMM[ 8]
++	vld1.8		{@XMM[12]-@XMM[13]}, [r0,:128]!
++	veor		@XMM[1], @XMM[1], @XMM[ 9]
++	veor		@XMM[8], @XMM[6], @XMM[10]
++	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!
++	veor		@XMM[9], @XMM[4], @XMM[11]
++	vld1.8		{@XMM[14]}, [r0,:128]!
++	veor		@XMM[10], @XMM[2], @XMM[12]
++	vst1.8		{@XMM[8]-@XMM[9]}, [$out]!
++	veor		@XMM[11], @XMM[7], @XMM[13]
++	veor		@XMM[12], @XMM[3], @XMM[14]
++	vst1.8		{@XMM[10]-@XMM[11]}, [$out]!
++	vst1.8		{@XMM[12]}, [$out]!
++
++	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	b		.Lxts_dec_done
++.Lxts_dec_6:
++	vst1.8		{@XMM[14]}, [$fp]		@ next round tweak
++
++	veor		@XMM[4], @XMM[4], @XMM[12]
++	mov		r4, $keysched
++	veor		@XMM[5], @XMM[5], @XMM[13]
++	mov		r5, $rounds			@ pass rounds
++	mov		r0, sp
++
++	bl		_bsaes_decrypt8
++
++	vld1.8		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
++	vld1.8		{@XMM[10]-@XMM[11]}, [r0,:128]!
++	veor		@XMM[0], @XMM[0], @XMM[ 8]
++	vld1.8		{@XMM[12]-@XMM[13]}, [r0,:128]!
++	veor		@XMM[1], @XMM[1], @XMM[ 9]
++	veor		@XMM[8], @XMM[6], @XMM[10]
++	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!
++	veor		@XMM[9], @XMM[4], @XMM[11]
++	veor		@XMM[10], @XMM[2], @XMM[12]
++	vst1.8		{@XMM[8]-@XMM[9]}, [$out]!
++	veor		@XMM[11], @XMM[7], @XMM[13]
++	vst1.8		{@XMM[10]-@XMM[11]}, [$out]!
++
++	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	b		.Lxts_dec_done
++.Lxts_dec_5:
++	vst1.8		{@XMM[13]}, [$fp]		@ next round tweak
++
++	veor		@XMM[3], @XMM[3], @XMM[11]
++	mov		r4, $keysched
++	veor		@XMM[4], @XMM[4], @XMM[12]
++	mov		r5, $rounds			@ pass rounds
++	mov		r0, sp
++
++	bl		_bsaes_decrypt8
++
++	vld1.8		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
++	vld1.8		{@XMM[10]-@XMM[11]}, [r0,:128]!
++	veor		@XMM[0], @XMM[0], @XMM[ 8]
++	vld1.8		{@XMM[12]}, [r0,:128]!
++	veor		@XMM[1], @XMM[1], @XMM[ 9]
++	veor		@XMM[8], @XMM[6], @XMM[10]
++	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!
++	veor		@XMM[9], @XMM[4], @XMM[11]
++	veor		@XMM[10], @XMM[2], @XMM[12]
++	vst1.8		{@XMM[8]-@XMM[9]}, [$out]!
++	vst1.8		{@XMM[10]}, [$out]!
++
++	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	b		.Lxts_dec_done
++.Lxts_dec_4:
++	vst1.8		{@XMM[12]}, [$fp]		@ next round tweak
++
++	veor		@XMM[2], @XMM[2], @XMM[10]
++	mov		r4, $keysched
++	veor		@XMM[3], @XMM[3], @XMM[11]
++	mov		r5, $rounds			@ pass rounds
++	mov		r0, sp
++
++	bl		_bsaes_decrypt8
++
++	vld1.8		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
++	vld1.8		{@XMM[10]-@XMM[11]}, [r0,:128]!
++	veor		@XMM[0], @XMM[0], @XMM[ 8]
++	veor		@XMM[1], @XMM[1], @XMM[ 9]
++	veor		@XMM[8], @XMM[6], @XMM[10]
++	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!
++	veor		@XMM[9], @XMM[4], @XMM[11]
++	vst1.8		{@XMM[8]-@XMM[9]}, [$out]!
++
++	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	b		.Lxts_dec_done
++.Lxts_dec_3:
++	vst1.8		{@XMM[11]}, [$fp]		@ next round tweak
++
++	veor		@XMM[1], @XMM[1], @XMM[9]
++	mov		r4, $keysched
++	veor		@XMM[2], @XMM[2], @XMM[10]
++	mov		r5, $rounds			@ pass rounds
++	mov		r0, sp
++
++	bl		_bsaes_decrypt8
++
++	vld1.8		{@XMM[8]-@XMM[9]}, [r0,:128]!
++	vld1.8		{@XMM[10]}, [r0,:128]!
++	veor		@XMM[0], @XMM[0], @XMM[ 8]
++	veor		@XMM[1], @XMM[1], @XMM[ 9]
++	veor		@XMM[8], @XMM[6], @XMM[10]
++	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!
++	vst1.8		{@XMM[8]}, [$out]!
++
++	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	b		.Lxts_dec_done
++.Lxts_dec_2:
++	vst1.8		{@XMM[10]}, [$fp]		@ next round tweak
++
++	veor		@XMM[0], @XMM[0], @XMM[8]
++	mov		r4, $keysched
++	veor		@XMM[1], @XMM[1], @XMM[9]
++	mov		r5, $rounds			@ pass rounds
++	mov		r0, sp
++
++	bl		_bsaes_decrypt8
++
++	vld1.8		{@XMM[8]-@XMM[9]}, [r0,:128]!
++	veor		@XMM[0], @XMM[0], @XMM[ 8]
++	veor		@XMM[1], @XMM[1], @XMM[ 9]
++	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!
++
++	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	b		.Lxts_dec_done
++.Lxts_dec_1:
++	mov		r0, sp
++	veor		@XMM[0], @XMM[8]
++	mov		r1, sp
++	vst1.8		{@XMM[0]}, [sp,:128]
++	mov		r2, $key
++	mov		r4, $fp				@ preserve fp
++
++	bl		AES_decrypt
++
++	vld1.8		{@XMM[0]}, [sp,:128]
++	veor		@XMM[0], @XMM[0], @XMM[8]
++	vst1.8		{@XMM[0]}, [$out]!
++	mov		$fp, r4
++
++	vmov		@XMM[8], @XMM[9]		@ next round tweak
++
++.Lxts_dec_done:
++	adds		$len, #0x10
++	beq		.Lxts_dec_ret
++
++	@ calculate one round of extra tweak for the stolen ciphertext
++	adrl		$magic, .Lxts_magic
++	vld1.8		{$twmask}, [$magic]
++	vshr.s64	@XMM[6], @XMM[8], #63
++	vand		@XMM[6], @XMM[6], $twmask
++	vadd.u64	@XMM[9], @XMM[8], @XMM[8]
++	vswp		`&Dhi("@XMM[6]")`,`&Dlo("@XMM[6]")`
++	veor		@XMM[9], @XMM[9], @XMM[6]
++
++	@ perform the final decryption with the last tweak value
++	vld1.8		{@XMM[0]}, [$inp]!
++	mov		r0, sp
++	veor		@XMM[0], @XMM[0], @XMM[9]
++	mov		r1, sp
++	vst1.8		{@XMM[0]}, [sp,:128]
++	mov		r2, $key
++	mov		r4, $fp			@ preserve fp
++
++	bl		AES_decrypt
++
++	vld1.8		{@XMM[0]}, [sp,:128]
++	veor		@XMM[0], @XMM[0], @XMM[9]
++	vst1.8		{@XMM[0]}, [$out]
++
++	mov		r6, $out
++.Lxts_dec_steal:
++	ldrb		r1, [$out]
++	ldrb		r0, [$inp], #1
++	strb		r1, [$out, #0x10]
++	strb		r0, [$out], #1
++
++	subs		$len, #1
++	bhi		.Lxts_dec_steal
++
++	vld1.8		{@XMM[0]}, [r6]
++	mov		r0, sp
++	veor		@XMM[0], @XMM[8]
++	mov		r1, sp
++	vst1.8		{@XMM[0]}, [sp,:128]
++	mov		r2, $key
++
++	bl		AES_decrypt
++
++	vld1.8		{@XMM[0]}, [sp,:128]
++	veor		@XMM[0], @XMM[0], @XMM[8]
++	vst1.8		{@XMM[0]}, [r6]
++	mov		$fp, r4
++
++.Lxts_dec_ret:
++	vmov.i32	d0, #0
++.Lxts_dec_bzero:				@ wipe key schedule [if any]
++	vstmia		sp!, {d0}
++	teq		sp, $fp
++	bne		.Lxts_dec_bzero
++
++	add		sp, $fp, #0x14
++	vldmia		sp!, {d8-d15}
++	ldmia		sp!, {r4-r11, pc}	@ return
++
++.size	bsaes_xts_decrypt,.-bsaes_xts_decrypt
++___
++}
+ $code.=<<___;
+ #endif
+ ___
+diff --git a/crypto/evp/e_aes.c b/crypto/evp/e_aes.c
+index f38a736..ded42ca 100644
+--- a/crypto/evp/e_aes.c
++++ b/crypto/evp/e_aes.c
+@@ -1072,13 +1072,11 @@ static int aes_xts_init_key(EVP_CIPHER_CTX *ctx, const unsigned char *key,
+ 		xctx->stream = NULL;
+ #endif
+ 		/* key_len is two AES keys */
+-#if !(defined(__arm__) || defined(__arm))	/* not yet? */
+ #ifdef BSAES_CAPABLE
+ 		if (BSAES_CAPABLE)
+ 			xctx->stream = enc ? bsaes_xts_encrypt : bsaes_xts_decrypt;
+ 		else
+ #endif
+-#endif
+ #ifdef VPAES_CAPABLE
+ 		if (VPAES_CAPABLE)
+ 		    {
+-- 
+1.8.3.1
+
diff --git a/meta/recipes-connectivity/openssl/openssl-1.0.1e/0010-bsaes-armv7.pl-remove-byte-order-dependency-and-mino.patch b/meta/recipes-connectivity/openssl/openssl-1.0.1e/0010-bsaes-armv7.pl-remove-byte-order-dependency-and-mino.patch
new file mode 100644
index 0000000..a5ea10c
--- /dev/null
+++ b/meta/recipes-connectivity/openssl/openssl-1.0.1e/0010-bsaes-armv7.pl-remove-byte-order-dependency-and-mino.patch
@@ -0,0 +1,763 @@
+From 20fc68727d8e84d605698c65a1bbe986a39b30a8 Mon Sep 17 00:00:00 2001
+From: Andy Polyakov <appro@openssl.org>
+Date: Sun, 15 Sep 2013 19:44:43 +0200
+Subject: [PATCH 10/15] bsaes-armv7.pl: remove byte order dependency and minor
+ optimization.
+
+Upstream-Status: Backport
+
+---
+ crypto/aes/asm/bsaes-armv7.pl | 285 ++++++++++++++++++++++--------------------
+ 1 file changed, 152 insertions(+), 133 deletions(-)
+
+diff --git a/crypto/aes/asm/bsaes-armv7.pl b/crypto/aes/asm/bsaes-armv7.pl
+index 9be80e5..2353ace 100644
+--- a/crypto/aes/asm/bsaes-armv7.pl
++++ b/crypto/aes/asm/bsaes-armv7.pl
+@@ -718,7 +718,7 @@ _bsaes_const:
+ .LREVM0SR:
+ 	.quad	0x090d02060c030708, 0x00040b0f050a0e01
+ .Lxts_magic:
+-	.long	1, 0, 0x87, 0
++	.quad	1, 0x87
+ .asciz	"Bit-sliced AES for NEON, CRYPTOGAMS by <appro\@openssl.org>"
+ .align	6
+ .size	_bsaes_const,.-_bsaes_const
+@@ -1418,7 +1418,8 @@ ___
+ #	const AES_KEY *key1, const AES_KEY *key2,
+ #	const unsigned char iv[16]);
+ #
+-my ($inp,$out,$len,$key,$rounds,$keysched,$magic,$fp)=(map("r$_",(7..11,1..3)));
++my ($inp,$out,$len,$key,$rounds,$magic,$fp)=(map("r$_",(7..10,1..3)));
++my $const="r6";		# returned by _bsaes_key_convert
+ my $twmask=@XMM[5];
+ my @T=@XMM[6..7];
+ 
+@@ -1427,41 +1428,41 @@ $code.=<<___;
+ .type	bsaes_xts_encrypt,%function
+ .align	4
+ bsaes_xts_encrypt:
+-	stmdb	sp!, {r4-r11, lr}		@ 0x24
++	stmdb	sp!, {r4-r10, lr}		@ 0x20
+ 	vstmdb	sp!, {d8-d15}			@ 0x40
+-	sub	sp, #0x14			@ 0x14
++	mov	r6, sp				@ future $fp
++	sub	sp, #0x10			@ 0x10
+ 
+ 	mov	$inp, r0
+ 	mov	$out, r1
+ 	mov	$len, r2
+ 	mov	$key, r3
++	bic	sp, #0xf			@ align at 16 bytes
+ 
+ 	@ generate initial tweak
+-	ldr	r0, [sp, #0x7c]			@ iv[]
++	ldr	r0, [r6, #0x64]			@ iv[]
+ 	mov	r1, sp
+-	ldr	r2, [sp, #0x78]			@ key2
++	ldr	r2, [r6, #0x60]			@ key2
+ 	bl	AES_encrypt
+ 
+ 	@ allocate the key schedule on the stack
+ 	ldr	$rounds, [$key, #240]		@ get # of rounds
+-	mov	$fp, sp
++	mov	$fp, r6
++	mov	r0, sp				@ pointer to initial tweak
+ 	sub	sp, sp, $rounds, lsl#7		@ 128 bytes per inner round key
+-	add	sp, sp, #`128-32`		@ size of bit-sliced key schedule
+-	mov	$keysched, sp
++	@ add	sp, sp, #`128-32`		@ size of bit-sliced key schedule
++	sub	sp, sp, #`32+16`		@ place for tweak[9]
+ 
+ 	@ populate the key schedule
+ 	mov	r4, $key			@ pass key
+ 	mov	r5, $rounds			@ pass # of rounds
+-	mov	r12, $keysched			@ pass key schedule
++	add	r12, sp, #0x90			@ pass key schedule
+ 	bl	_bsaes_key_convert
+ 	veor	@XMM[7], @XMM[7], @XMM[15]	@ fix up last round key
+ 	vstmia	r12, {@XMM[7]}			@ save last round key
+ 
+-	sub	sp, #0x80			@ place for tweak[8]
+-	bic	sp, #0x8			@ align at 16 bytes
+-
+-	vld1.8	{@XMM[8]}, [$fp]		@ initial tweak
+-	adrl	$magic, .Lxts_magic
++	vld1.8	{@XMM[8]}, [r0]			@ initial tweak
++	add	$magic, $const, #.Lxts_magic-.LM0
+ 
+ 	subs	$len, #0x80
+ 	blo	.Lxts_enc_short
+@@ -1469,7 +1470,7 @@ bsaes_xts_encrypt:
+ 
+ .align	4
+ .Lxts_enc_loop:
+-	vld1.8		{$twmask}, [$magic]	@ load XTS magic
++	vldmia		$magic, {$twmask}	@ load XTS magic
+ 	vshr.s64	@T[0], @XMM[8], #63
+ 	mov		r0, sp
+ 	vand		@T[0], @T[0], $twmask
+@@ -1477,7 +1478,7 @@ ___
+ for($i=9;$i<16;$i++) {
+ $code.=<<___;
+ 	vadd.u64	@XMM[$i], @XMM[$i-1], @XMM[$i-1]
+-	vst1.8		{@XMM[$i-1]}, [r0,:128]!
++	vst1.64		{@XMM[$i-1]}, [r0,:128]!
+ 	vswp		`&Dhi("@T[0]")`,`&Dlo("@T[0]")`
+ 	vshr.s64	@T[1], @XMM[$i], #63
+ 	veor		@XMM[$i], @XMM[$i], @T[0]
+@@ -1494,14 +1495,14 @@ ___
+ }
+ $code.=<<___;
+ 	vadd.u64	@XMM[8], @XMM[15], @XMM[15]
+-	vst1.8		{@XMM[15]}, [r0,:128]
++	vst1.64		{@XMM[15]}, [r0,:128]!
+ 	vswp		`&Dhi("@T[0]")`,`&Dlo("@T[0]")`
+ 	veor		@XMM[8], @XMM[8], @T[0]
+-	vst1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	vst1.64		{@XMM[8]}, [r0,:128]		@ next round tweak
+ 
+ 	vld1.8		{@XMM[6]-@XMM[7]}, [$inp]!
+ 	veor		@XMM[5], @XMM[5], @XMM[13]
+-	mov		r4, $keysched
++	add		r4, sp, #0x90			@ pass key schedule
+ 	veor		@XMM[6], @XMM[6], @XMM[14]
+ 	mov		r5, $rounds			@ pass rounds
+ 	veor		@XMM[7], @XMM[7], @XMM[15]
+@@ -1509,15 +1510,15 @@ $code.=<<___;
+ 
+ 	bl		_bsaes_encrypt8
+ 
+-	vld1.8		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
+-	vld1.8		{@XMM[10]-@XMM[11]}, [r0,:128]!
++	vld1.64		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
++	vld1.64		{@XMM[10]-@XMM[11]}, [r0,:128]!
+ 	veor		@XMM[0], @XMM[0], @XMM[ 8]
+-	vld1.8		{@XMM[12]-@XMM[13]}, [r0,:128]!
++	vld1.64		{@XMM[12]-@XMM[13]}, [r0,:128]!
+ 	veor		@XMM[1], @XMM[1], @XMM[ 9]
+ 	veor		@XMM[8], @XMM[4], @XMM[10]
+ 	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!
+ 	veor		@XMM[9], @XMM[6], @XMM[11]
+-	vld1.8		{@XMM[14]-@XMM[15]}, [r0,:128]!
++	vld1.64		{@XMM[14]-@XMM[15]}, [r0,:128]!
+ 	veor		@XMM[10], @XMM[3], @XMM[12]
+ 	vst1.8		{@XMM[8]-@XMM[9]}, [$out]!
+ 	veor		@XMM[11], @XMM[7], @XMM[13]
+@@ -1526,7 +1527,7 @@ $code.=<<___;
+ 	veor		@XMM[13], @XMM[5], @XMM[15]
+ 	vst1.8		{@XMM[12]-@XMM[13]}, [$out]!
+ 
+-	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	vld1.64		{@XMM[8]}, [r0,:128]		@ next round tweak
+ 
+ 	subs		$len, #0x80
+ 	bpl		.Lxts_enc_loop
+@@ -1535,7 +1536,7 @@ $code.=<<___;
+ 	adds		$len, #0x70
+ 	bmi		.Lxts_enc_done
+ 
+-	vld1.8		{$twmask}, [$magic]	@ load XTS magic
++	vldmia		$magic, {$twmask}	@ load XTS magic
+ 	vshr.s64	@T[0], @XMM[8], #63
+ 	mov		r0, sp
+ 	vand		@T[0], @T[0], $twmask
+@@ -1543,7 +1544,7 @@ ___
+ for($i=9;$i<16;$i++) {
+ $code.=<<___;
+ 	vadd.u64	@XMM[$i], @XMM[$i-1], @XMM[$i-1]
+-	vst1.8		{@XMM[$i-1]}, [r0,:128]!
++	vst1.64		{@XMM[$i-1]}, [r0,:128]!
+ 	vswp		`&Dhi("@T[0]")`,`&Dlo("@T[0]")`
+ 	vshr.s64	@T[1], @XMM[$i], #63
+ 	veor		@XMM[$i], @XMM[$i], @T[0]
+@@ -1562,26 +1563,26 @@ ___
+ }
+ $code.=<<___;
+ 	sub		$len, #0x10
+-	vst1.8		{@XMM[15]}, [$fp]		@ next round tweak
++	vst1.64		{@XMM[15]}, [r0,:128]		@ next round tweak
+ 
+ 	vld1.8		{@XMM[6]}, [$inp]!
+ 	veor		@XMM[5], @XMM[5], @XMM[13]
+-	mov		r4, $keysched
++	add		r4, sp, #0x90			@ pass key schedule
+ 	veor		@XMM[6], @XMM[6], @XMM[14]
+ 	mov		r5, $rounds			@ pass rounds
+ 	mov		r0, sp
+ 
+ 	bl		_bsaes_encrypt8
+ 
+-	vld1.8		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
+-	vld1.8		{@XMM[10]-@XMM[11]}, [r0,:128]!
++	vld1.64		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
++	vld1.64		{@XMM[10]-@XMM[11]}, [r0,:128]!
+ 	veor		@XMM[0], @XMM[0], @XMM[ 8]
+-	vld1.8		{@XMM[12]-@XMM[13]}, [r0,:128]!
++	vld1.64		{@XMM[12]-@XMM[13]}, [r0,:128]!
+ 	veor		@XMM[1], @XMM[1], @XMM[ 9]
+ 	veor		@XMM[8], @XMM[4], @XMM[10]
+ 	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!
+ 	veor		@XMM[9], @XMM[6], @XMM[11]
+-	vld1.8		{@XMM[14]}, [r0,:128]!
++	vld1.64		{@XMM[14]}, [r0,:128]!
+ 	veor		@XMM[10], @XMM[3], @XMM[12]
+ 	vst1.8		{@XMM[8]-@XMM[9]}, [$out]!
+ 	veor		@XMM[11], @XMM[7], @XMM[13]
+@@ -1589,23 +1590,24 @@ $code.=<<___;
+ 	vst1.8		{@XMM[10]-@XMM[11]}, [$out]!
+ 	vst1.8		{@XMM[12]}, [$out]!
+ 
+-	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	vld1.64		{@XMM[8]}, [r0,:128]		@ next round tweak
+ 	b		.Lxts_enc_done
++.align	4
+ .Lxts_enc_6:
+-	vst1.8		{@XMM[14]}, [$fp]		@ next round tweak
++	vst1.64		{@XMM[14]}, [r0,:128]		@ next round tweak
+ 
+ 	veor		@XMM[4], @XMM[4], @XMM[12]
+-	mov		r4, $keysched
++	add		r4, sp, #0x90			@ pass key schedule
+ 	veor		@XMM[5], @XMM[5], @XMM[13]
+ 	mov		r5, $rounds			@ pass rounds
+ 	mov		r0, sp
+ 
+ 	bl		_bsaes_encrypt8
+ 
+-	vld1.8		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
+-	vld1.8		{@XMM[10]-@XMM[11]}, [r0,:128]!
++	vld1.64		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
++	vld1.64		{@XMM[10]-@XMM[11]}, [r0,:128]!
+ 	veor		@XMM[0], @XMM[0], @XMM[ 8]
+-	vld1.8		{@XMM[12]-@XMM[13]}, [r0,:128]!
++	vld1.64		{@XMM[12]-@XMM[13]}, [r0,:128]!
+ 	veor		@XMM[1], @XMM[1], @XMM[ 9]
+ 	veor		@XMM[8], @XMM[4], @XMM[10]
+ 	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!
+@@ -1615,23 +1617,24 @@ $code.=<<___;
+ 	veor		@XMM[11], @XMM[7], @XMM[13]
+ 	vst1.8		{@XMM[10]-@XMM[11]}, [$out]!
+ 
+-	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	vld1.64		{@XMM[8]}, [r0,:128]		@ next round tweak
+ 	b		.Lxts_enc_done
++.align	4
+ .Lxts_enc_5:
+-	vst1.8		{@XMM[13]}, [$fp]		@ next round tweak
++	vst1.64		{@XMM[13]}, [r0,:128]		@ next round tweak
+ 
+ 	veor		@XMM[3], @XMM[3], @XMM[11]
+-	mov		r4, $keysched
++	add		r4, sp, #0x90			@ pass key schedule
+ 	veor		@XMM[4], @XMM[4], @XMM[12]
+ 	mov		r5, $rounds			@ pass rounds
+ 	mov		r0, sp
+ 
+ 	bl		_bsaes_encrypt8
+ 
+-	vld1.8		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
+-	vld1.8		{@XMM[10]-@XMM[11]}, [r0,:128]!
++	vld1.64		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
++	vld1.64		{@XMM[10]-@XMM[11]}, [r0,:128]!
+ 	veor		@XMM[0], @XMM[0], @XMM[ 8]
+-	vld1.8		{@XMM[12]}, [r0,:128]!
++	vld1.64		{@XMM[12]}, [r0,:128]!
+ 	veor		@XMM[1], @XMM[1], @XMM[ 9]
+ 	veor		@XMM[8], @XMM[4], @XMM[10]
+ 	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!
+@@ -1640,21 +1643,22 @@ $code.=<<___;
+ 	vst1.8		{@XMM[8]-@XMM[9]}, [$out]!
+ 	vst1.8		{@XMM[10]}, [$out]!
+ 
+-	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	vld1.64		{@XMM[8]}, [r0,:128]		@ next round tweak
+ 	b		.Lxts_enc_done
++.align	4
+ .Lxts_enc_4:
+-	vst1.8		{@XMM[12]}, [$fp]		@ next round tweak
++	vst1.64		{@XMM[12]}, [r0,:128]		@ next round tweak
+ 
+ 	veor		@XMM[2], @XMM[2], @XMM[10]
+-	mov		r4, $keysched
++	add		r4, sp, #0x90			@ pass key schedule
+ 	veor		@XMM[3], @XMM[3], @XMM[11]
+ 	mov		r5, $rounds			@ pass rounds
+ 	mov		r0, sp
+ 
+ 	bl		_bsaes_encrypt8
+ 
+-	vld1.8		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
+-	vld1.8		{@XMM[10]-@XMM[11]}, [r0,:128]!
++	vld1.64		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
++	vld1.64		{@XMM[10]-@XMM[11]}, [r0,:128]!
+ 	veor		@XMM[0], @XMM[0], @XMM[ 8]
+ 	veor		@XMM[1], @XMM[1], @XMM[ 9]
+ 	veor		@XMM[8], @XMM[4], @XMM[10]
+@@ -1662,47 +1666,50 @@ $code.=<<___;
+ 	veor		@XMM[9], @XMM[6], @XMM[11]
+ 	vst1.8		{@XMM[8]-@XMM[9]}, [$out]!
+ 
+-	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	vld1.64		{@XMM[8]}, [r0,:128]		@ next round tweak
+ 	b		.Lxts_enc_done
++.align	4
+ .Lxts_enc_3:
+-	vst1.8		{@XMM[11]}, [$fp]		@ next round tweak
++	vst1.64		{@XMM[11]}, [r0,:128]		@ next round tweak
+ 
+ 	veor		@XMM[1], @XMM[1], @XMM[9]
+-	mov		r4, $keysched
++	add		r4, sp, #0x90			@ pass key schedule
+ 	veor		@XMM[2], @XMM[2], @XMM[10]
+ 	mov		r5, $rounds			@ pass rounds
+ 	mov		r0, sp
+ 
+ 	bl		_bsaes_encrypt8
+ 
+-	vld1.8		{@XMM[8]-@XMM[9]}, [r0,:128]!
+-	vld1.8		{@XMM[10]}, [r0,:128]!
++	vld1.64		{@XMM[8]-@XMM[9]}, [r0,:128]!
++	vld1.64		{@XMM[10]}, [r0,:128]!
+ 	veor		@XMM[0], @XMM[0], @XMM[ 8]
+ 	veor		@XMM[1], @XMM[1], @XMM[ 9]
+ 	veor		@XMM[8], @XMM[4], @XMM[10]
+ 	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!
+ 	vst1.8		{@XMM[8]}, [$out]!
+ 
+-	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	vld1.64		{@XMM[8]}, [r0,:128]		@ next round tweak
+ 	b		.Lxts_enc_done
++.align	4
+ .Lxts_enc_2:
+-	vst1.8		{@XMM[10]}, [$fp]		@ next round tweak
++	vst1.64		{@XMM[10]}, [r0,:128]		@ next round tweak
+ 
+ 	veor		@XMM[0], @XMM[0], @XMM[8]
+-	mov		r4, $keysched
++	add		r4, sp, #0x90			@ pass key schedule
+ 	veor		@XMM[1], @XMM[1], @XMM[9]
+ 	mov		r5, $rounds			@ pass rounds
+ 	mov		r0, sp
+ 
+ 	bl		_bsaes_encrypt8
+ 
+-	vld1.8		{@XMM[8]-@XMM[9]}, [r0,:128]!
++	vld1.64		{@XMM[8]-@XMM[9]}, [r0,:128]!
+ 	veor		@XMM[0], @XMM[0], @XMM[ 8]
+ 	veor		@XMM[1], @XMM[1], @XMM[ 9]
+ 	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!
+ 
+-	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	vld1.64		{@XMM[8]}, [r0,:128]		@ next round tweak
+ 	b		.Lxts_enc_done
++.align	4
+ .Lxts_enc_1:
+ 	mov		r0, sp
+ 	veor		@XMM[0], @XMM[8]
+@@ -1750,15 +1757,17 @@ $code.=<<___;
+ 	mov		$fp, r4
+ 
+ .Lxts_enc_ret:
+-	vmov.i32	d0, #0
++	bic		r0, $fp, #0xf
++	vmov.i32	q0, #0
++	vmov.i32	q1, #0
+ .Lxts_enc_bzero:				@ wipe key schedule [if any]
+-	vstmia		sp!, {d0}
+-	teq		sp, $fp
++	vstmia		sp!, {q0-q1}
++	teq		sp, r0
+ 	bne		.Lxts_enc_bzero
+ 
+-	add		sp, $fp, #0x14
++	mov		sp, $fp
+ 	vldmia		sp!, {d8-d15}
+-	ldmia		sp!, {r4-r11, pc}	@ return
++	ldmia		sp!, {r4-r10, pc}	@ return
+ 
+ .size	bsaes_xts_encrypt,.-bsaes_xts_encrypt
+ 
+@@ -1766,46 +1775,47 @@ $code.=<<___;
+ .type	bsaes_xts_decrypt,%function
+ .align	4
+ bsaes_xts_decrypt:
+-	stmdb	sp!, {r4-r11, lr}		@ 0x24
++	stmdb	sp!, {r4-r10, lr}		@ 0x20
+ 	vstmdb	sp!, {d8-d15}			@ 0x40
+-	sub	sp, #0x14			@ 0x14
++	mov	r6, sp				@ future $fp
++	sub	sp, #0x10			@ 0x10
+ 
+ 	mov	$inp, r0
+ 	mov	$out, r1
+ 	mov	$len, r2
+ 	mov	$key, r3
++	bic	sp, #0xf			@ align at 16 bytes
+ 
+ 	@ generate initial tweak
+-	ldr	r0, [sp, #0x7c]			@ iv[]
++	ldr	r0, [r6, #0x64]			@ iv[]
+ 	mov	r1, sp
+-	ldr	r2, [sp, #0x78]			@ key2
++	ldr	r2, [r6, #0x60]			@ key2
+ 	bl	AES_encrypt
+ 
+ 	@ allocate the key schedule on the stack
+ 	ldr	$rounds, [$key, #240]		@ get # of rounds
+-	mov	$fp, sp
++	mov	$fp, r6
++	mov	r0, sp				@ pointer to initial tweak
+ 	sub	sp, sp, $rounds, lsl#7		@ 128 bytes per inner round key
+-	add	sp, sp, #`128-32`		@ size of bit-sliced key schedule
+-	mov	$keysched, sp
++	@ add	sp, sp, #`128-32`		@ size of bit-sliced key schedule
++	sub	sp, sp, #`32+16`		@ place for tweak[9]
+ 
+ 	@ populate the key schedule
+ 	mov	r4, $key			@ pass key
+ 	mov	r5, $rounds			@ pass # of rounds
+-	mov	r12, $keysched			@ pass key schedule
++	add	r12, sp, #0x90			@ pass key schedule
+ 	bl	_bsaes_key_convert
+-	vldmia	$keysched, {@XMM[6]}
++	add	r4, sp, #0x90
++	vldmia	r4, {@XMM[6]}
+ 	vstmia	r12,  {@XMM[15]}		@ save last round key
+ 	veor	@XMM[7], @XMM[7], @XMM[6]	@ fix up round 0 key
+-	vstmia	$keysched, {@XMM[7]}
++	vstmia	r4, {@XMM[7]}
+ 
+-	sub	sp, #0x80			@ place for tweak[8]
+-	bic	sp, #0x8			@ align at 16 bytes
+-
+-	vld1.8	{@XMM[8]}, [$fp]		@ initial tweak
+-	adrl	$magic, .Lxts_magic
++	vld1.8	{@XMM[8]}, [r0]			@ initial tweak
++	add	$magic, $const, #.Lxts_magic-.LM0
+ 
+ 	tst	$len, #0xf			@ if not multiple of 16
+-	subne	$len, #0x10			@     subtract another 16 bytes
++	subne	$len, #0x10			@ subtract another 16 bytes
+ 	subs	$len, #0x80
+ 
+ 	blo	.Lxts_dec_short
+@@ -1813,7 +1823,7 @@ bsaes_xts_decrypt:
+ 
+ .align	4
+ .Lxts_dec_loop:
+-	vld1.8		{$twmask}, [$magic]	@ load XTS magic
++	vldmia		$magic, {$twmask}	@ load XTS magic
+ 	vshr.s64	@T[0], @XMM[8], #63
+ 	mov		r0, sp
+ 	vand		@T[0], @T[0], $twmask
+@@ -1821,7 +1831,7 @@ ___
+ for($i=9;$i<16;$i++) {
+ $code.=<<___;
+ 	vadd.u64	@XMM[$i], @XMM[$i-1], @XMM[$i-1]
+-	vst1.8		{@XMM[$i-1]}, [r0,:128]!
++	vst1.64		{@XMM[$i-1]}, [r0,:128]!
+ 	vswp		`&Dhi("@T[0]")`,`&Dlo("@T[0]")`
+ 	vshr.s64	@T[1], @XMM[$i], #63
+ 	veor		@XMM[$i], @XMM[$i], @T[0]
+@@ -1838,14 +1848,14 @@ ___
+ }
+ $code.=<<___;
+ 	vadd.u64	@XMM[8], @XMM[15], @XMM[15]
+-	vst1.8		{@XMM[15]}, [r0,:128]
++	vst1.64		{@XMM[15]}, [r0,:128]!
+ 	vswp		`&Dhi("@T[0]")`,`&Dlo("@T[0]")`
+ 	veor		@XMM[8], @XMM[8], @T[0]
+-	vst1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	vst1.64		{@XMM[8]}, [r0,:128]		@ next round tweak
+ 
+ 	vld1.8		{@XMM[6]-@XMM[7]}, [$inp]!
+ 	veor		@XMM[5], @XMM[5], @XMM[13]
+-	mov		r4, $keysched
++	add		r4, sp, #0x90			@ pass key schedule
+ 	veor		@XMM[6], @XMM[6], @XMM[14]
+ 	mov		r5, $rounds			@ pass rounds
+ 	veor		@XMM[7], @XMM[7], @XMM[15]
+@@ -1853,15 +1863,15 @@ $code.=<<___;
+ 
+ 	bl		_bsaes_decrypt8
+ 
+-	vld1.8		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
+-	vld1.8		{@XMM[10]-@XMM[11]}, [r0,:128]!
++	vld1.64		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
++	vld1.64		{@XMM[10]-@XMM[11]}, [r0,:128]!
+ 	veor		@XMM[0], @XMM[0], @XMM[ 8]
+-	vld1.8		{@XMM[12]-@XMM[13]}, [r0,:128]!
++	vld1.64		{@XMM[12]-@XMM[13]}, [r0,:128]!
+ 	veor		@XMM[1], @XMM[1], @XMM[ 9]
+ 	veor		@XMM[8], @XMM[6], @XMM[10]
+ 	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!
+ 	veor		@XMM[9], @XMM[4], @XMM[11]
+-	vld1.8		{@XMM[14]-@XMM[15]}, [r0,:128]!
++	vld1.64		{@XMM[14]-@XMM[15]}, [r0,:128]!
+ 	veor		@XMM[10], @XMM[2], @XMM[12]
+ 	vst1.8		{@XMM[8]-@XMM[9]}, [$out]!
+ 	veor		@XMM[11], @XMM[7], @XMM[13]
+@@ -1870,7 +1880,7 @@ $code.=<<___;
+ 	veor		@XMM[13], @XMM[5], @XMM[15]
+ 	vst1.8		{@XMM[12]-@XMM[13]}, [$out]!
+ 
+-	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	vld1.64		{@XMM[8]}, [r0,:128]		@ next round tweak
+ 
+ 	subs		$len, #0x80
+ 	bpl		.Lxts_dec_loop
+@@ -1879,7 +1889,7 @@ $code.=<<___;
+ 	adds		$len, #0x70
+ 	bmi		.Lxts_dec_done
+ 
+-	vld1.8		{$twmask}, [$magic]	@ load XTS magic
++	vldmia		$magic, {$twmask}	@ load XTS magic
+ 	vshr.s64	@T[0], @XMM[8], #63
+ 	mov		r0, sp
+ 	vand		@T[0], @T[0], $twmask
+@@ -1887,7 +1897,7 @@ ___
+ for($i=9;$i<16;$i++) {
+ $code.=<<___;
+ 	vadd.u64	@XMM[$i], @XMM[$i-1], @XMM[$i-1]
+-	vst1.8		{@XMM[$i-1]}, [r0,:128]!
++	vst1.64		{@XMM[$i-1]}, [r0,:128]!
+ 	vswp		`&Dhi("@T[0]")`,`&Dlo("@T[0]")`
+ 	vshr.s64	@T[1], @XMM[$i], #63
+ 	veor		@XMM[$i], @XMM[$i], @T[0]
+@@ -1906,26 +1916,26 @@ ___
+ }
+ $code.=<<___;
+ 	sub		$len, #0x10
+-	vst1.8		{@XMM[15]}, [$fp]		@ next round tweak
++	vst1.64		{@XMM[15]}, [r0,:128]		@ next round tweak
+ 
+ 	vld1.8		{@XMM[6]}, [$inp]!
+ 	veor		@XMM[5], @XMM[5], @XMM[13]
+-	mov		r4, $keysched
++	add		r4, sp, #0x90			@ pass key schedule
+ 	veor		@XMM[6], @XMM[6], @XMM[14]
+ 	mov		r5, $rounds			@ pass rounds
+ 	mov		r0, sp
+ 
+ 	bl		_bsaes_decrypt8
+ 
+-	vld1.8		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
+-	vld1.8		{@XMM[10]-@XMM[11]}, [r0,:128]!
++	vld1.64		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
++	vld1.64		{@XMM[10]-@XMM[11]}, [r0,:128]!
+ 	veor		@XMM[0], @XMM[0], @XMM[ 8]
+-	vld1.8		{@XMM[12]-@XMM[13]}, [r0,:128]!
++	vld1.64		{@XMM[12]-@XMM[13]}, [r0,:128]!
+ 	veor		@XMM[1], @XMM[1], @XMM[ 9]
+ 	veor		@XMM[8], @XMM[6], @XMM[10]
+ 	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!
+ 	veor		@XMM[9], @XMM[4], @XMM[11]
+-	vld1.8		{@XMM[14]}, [r0,:128]!
++	vld1.64		{@XMM[14]}, [r0,:128]!
+ 	veor		@XMM[10], @XMM[2], @XMM[12]
+ 	vst1.8		{@XMM[8]-@XMM[9]}, [$out]!
+ 	veor		@XMM[11], @XMM[7], @XMM[13]
+@@ -1933,23 +1943,24 @@ $code.=<<___;
+ 	vst1.8		{@XMM[10]-@XMM[11]}, [$out]!
+ 	vst1.8		{@XMM[12]}, [$out]!
+ 
+-	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	vld1.64		{@XMM[8]}, [r0,:128]		@ next round tweak
+ 	b		.Lxts_dec_done
++.align	4
+ .Lxts_dec_6:
+-	vst1.8		{@XMM[14]}, [$fp]		@ next round tweak
++	vst1.64		{@XMM[14]}, [r0,:128]		@ next round tweak
+ 
+ 	veor		@XMM[4], @XMM[4], @XMM[12]
+-	mov		r4, $keysched
++	add		r4, sp, #0x90			@ pass key schedule
+ 	veor		@XMM[5], @XMM[5], @XMM[13]
+ 	mov		r5, $rounds			@ pass rounds
+ 	mov		r0, sp
+ 
+ 	bl		_bsaes_decrypt8
+ 
+-	vld1.8		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
+-	vld1.8		{@XMM[10]-@XMM[11]}, [r0,:128]!
++	vld1.64		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
++	vld1.64		{@XMM[10]-@XMM[11]}, [r0,:128]!
+ 	veor		@XMM[0], @XMM[0], @XMM[ 8]
+-	vld1.8		{@XMM[12]-@XMM[13]}, [r0,:128]!
++	vld1.64		{@XMM[12]-@XMM[13]}, [r0,:128]!
+ 	veor		@XMM[1], @XMM[1], @XMM[ 9]
+ 	veor		@XMM[8], @XMM[6], @XMM[10]
+ 	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!
+@@ -1959,23 +1970,24 @@ $code.=<<___;
+ 	veor		@XMM[11], @XMM[7], @XMM[13]
+ 	vst1.8		{@XMM[10]-@XMM[11]}, [$out]!
+ 
+-	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	vld1.64		{@XMM[8]}, [r0,:128]		@ next round tweak
+ 	b		.Lxts_dec_done
++.align	4
+ .Lxts_dec_5:
+-	vst1.8		{@XMM[13]}, [$fp]		@ next round tweak
++	vst1.64		{@XMM[13]}, [r0,:128]		@ next round tweak
+ 
+ 	veor		@XMM[3], @XMM[3], @XMM[11]
+-	mov		r4, $keysched
++	add		r4, sp, #0x90			@ pass key schedule
+ 	veor		@XMM[4], @XMM[4], @XMM[12]
+ 	mov		r5, $rounds			@ pass rounds
+ 	mov		r0, sp
+ 
+ 	bl		_bsaes_decrypt8
+ 
+-	vld1.8		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
+-	vld1.8		{@XMM[10]-@XMM[11]}, [r0,:128]!
++	vld1.64		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
++	vld1.64		{@XMM[10]-@XMM[11]}, [r0,:128]!
+ 	veor		@XMM[0], @XMM[0], @XMM[ 8]
+-	vld1.8		{@XMM[12]}, [r0,:128]!
++	vld1.64		{@XMM[12]}, [r0,:128]!
+ 	veor		@XMM[1], @XMM[1], @XMM[ 9]
+ 	veor		@XMM[8], @XMM[6], @XMM[10]
+ 	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!
+@@ -1984,21 +1996,22 @@ $code.=<<___;
+ 	vst1.8		{@XMM[8]-@XMM[9]}, [$out]!
+ 	vst1.8		{@XMM[10]}, [$out]!
+ 
+-	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	vld1.64		{@XMM[8]}, [r0,:128]		@ next round tweak
+ 	b		.Lxts_dec_done
++.align	4
+ .Lxts_dec_4:
+-	vst1.8		{@XMM[12]}, [$fp]		@ next round tweak
++	vst1.64		{@XMM[12]}, [r0,:128]		@ next round tweak
+ 
+ 	veor		@XMM[2], @XMM[2], @XMM[10]
+-	mov		r4, $keysched
++	add		r4, sp, #0x90			@ pass key schedule
+ 	veor		@XMM[3], @XMM[3], @XMM[11]
+ 	mov		r5, $rounds			@ pass rounds
+ 	mov		r0, sp
+ 
+ 	bl		_bsaes_decrypt8
+ 
+-	vld1.8		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
+-	vld1.8		{@XMM[10]-@XMM[11]}, [r0,:128]!
++	vld1.64		{@XMM[ 8]-@XMM[ 9]}, [r0,:128]!
++	vld1.64		{@XMM[10]-@XMM[11]}, [r0,:128]!
+ 	veor		@XMM[0], @XMM[0], @XMM[ 8]
+ 	veor		@XMM[1], @XMM[1], @XMM[ 9]
+ 	veor		@XMM[8], @XMM[6], @XMM[10]
+@@ -2006,47 +2019,50 @@ $code.=<<___;
+ 	veor		@XMM[9], @XMM[4], @XMM[11]
+ 	vst1.8		{@XMM[8]-@XMM[9]}, [$out]!
+ 
+-	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	vld1.64		{@XMM[8]}, [r0,:128]		@ next round tweak
+ 	b		.Lxts_dec_done
++.align	4
+ .Lxts_dec_3:
+-	vst1.8		{@XMM[11]}, [$fp]		@ next round tweak
++	vst1.64		{@XMM[11]}, [r0,:128]		@ next round tweak
+ 
+ 	veor		@XMM[1], @XMM[1], @XMM[9]
+-	mov		r4, $keysched
++	add		r4, sp, #0x90			@ pass key schedule
+ 	veor		@XMM[2], @XMM[2], @XMM[10]
+ 	mov		r5, $rounds			@ pass rounds
+ 	mov		r0, sp
+ 
+ 	bl		_bsaes_decrypt8
+ 
+-	vld1.8		{@XMM[8]-@XMM[9]}, [r0,:128]!
+-	vld1.8		{@XMM[10]}, [r0,:128]!
++	vld1.64		{@XMM[8]-@XMM[9]}, [r0,:128]!
++	vld1.64		{@XMM[10]}, [r0,:128]!
+ 	veor		@XMM[0], @XMM[0], @XMM[ 8]
+ 	veor		@XMM[1], @XMM[1], @XMM[ 9]
+ 	veor		@XMM[8], @XMM[6], @XMM[10]
+ 	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!
+ 	vst1.8		{@XMM[8]}, [$out]!
+ 
+-	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	vld1.64		{@XMM[8]}, [r0,:128]		@ next round tweak
+ 	b		.Lxts_dec_done
++.align	4
+ .Lxts_dec_2:
+-	vst1.8		{@XMM[10]}, [$fp]		@ next round tweak
++	vst1.64		{@XMM[10]}, [r0,:128]		@ next round tweak
+ 
+ 	veor		@XMM[0], @XMM[0], @XMM[8]
+-	mov		r4, $keysched
++	add		r4, sp, #0x90			@ pass key schedule
+ 	veor		@XMM[1], @XMM[1], @XMM[9]
+ 	mov		r5, $rounds			@ pass rounds
+ 	mov		r0, sp
+ 
+ 	bl		_bsaes_decrypt8
+ 
+-	vld1.8		{@XMM[8]-@XMM[9]}, [r0,:128]!
++	vld1.64		{@XMM[8]-@XMM[9]}, [r0,:128]!
+ 	veor		@XMM[0], @XMM[0], @XMM[ 8]
+ 	veor		@XMM[1], @XMM[1], @XMM[ 9]
+ 	vst1.8		{@XMM[0]-@XMM[1]}, [$out]!
+ 
+-	vld1.8		{@XMM[8]}, [$fp]		@ next round tweak
++	vld1.64		{@XMM[8]}, [r0,:128]		@ next round tweak
+ 	b		.Lxts_dec_done
++.align	4
+ .Lxts_dec_1:
+ 	mov		r0, sp
+ 	veor		@XMM[0], @XMM[8]
+@@ -2054,6 +2070,7 @@ $code.=<<___;
+ 	vst1.8		{@XMM[0]}, [sp,:128]
+ 	mov		r2, $key
+ 	mov		r4, $fp				@ preserve fp
++	mov		r5, $magic			@ preserve magic
+ 
+ 	bl		AES_decrypt
+ 
+@@ -2061,6 +2078,7 @@ $code.=<<___;
+ 	veor		@XMM[0], @XMM[0], @XMM[8]
+ 	vst1.8		{@XMM[0]}, [$out]!
+ 	mov		$fp, r4
++	mov		$magic, r5
+ 
+ 	vmov		@XMM[8], @XMM[9]		@ next round tweak
+ 
+@@ -2069,8 +2087,7 @@ $code.=<<___;
+ 	beq		.Lxts_dec_ret
+ 
+ 	@ calculate one round of extra tweak for the stolen ciphertext
+-	adrl		$magic, .Lxts_magic
+-	vld1.8		{$twmask}, [$magic]
++	vldmia		$magic, {$twmask}
+ 	vshr.s64	@XMM[6], @XMM[8], #63
+ 	vand		@XMM[6], @XMM[6], $twmask
+ 	vadd.u64	@XMM[9], @XMM[8], @XMM[8]
+@@ -2117,15 +2134,17 @@ $code.=<<___;
+ 	mov		$fp, r4
+ 
+ .Lxts_dec_ret:
+-	vmov.i32	d0, #0
++	bic		r0, $fp, #0xf
++	vmov.i32	q0, #0
++	vmov.i32	q1, #0
+ .Lxts_dec_bzero:				@ wipe key schedule [if any]
+-	vstmia		sp!, {d0}
+-	teq		sp, $fp
++	vstmia		sp!, {q0-q1}
++	teq		sp, r0
+ 	bne		.Lxts_dec_bzero
+ 
+-	add		sp, $fp, #0x14
++	mov		sp, $fp
+ 	vldmia		sp!, {d8-d15}
+-	ldmia		sp!, {r4-r11, pc}	@ return
++	ldmia		sp!, {r4-r10, pc}	@ return
+ 
+ .size	bsaes_xts_decrypt,.-bsaes_xts_decrypt
+ ___
+-- 
+1.8.3.1
+
diff --git a/meta/recipes-connectivity/openssl/openssl-1.0.1e/0011-bsaes-armv7.pl-remove-partial-register-operations-in.patch b/meta/recipes-connectivity/openssl/openssl-1.0.1e/0011-bsaes-armv7.pl-remove-partial-register-operations-in.patch
new file mode 100644
index 0000000..efd8fd6
--- /dev/null
+++ b/meta/recipes-connectivity/openssl/openssl-1.0.1e/0011-bsaes-armv7.pl-remove-partial-register-operations-in.patch
@@ -0,0 +1,60 @@
+From 50a0e7c4dd265d606598c8c0df8c56f0b1f87d62 Mon Sep 17 00:00:00 2001
+From: Andy Polyakov <appro@openssl.org>
+Date: Sun, 15 Sep 2013 19:47:51 +0200
+Subject: [PATCH 11/15] bsaes-armv7.pl: remove partial register operations in
+ CTR subroutine.
+
+Upstream-Status: Backport
+
+---
+ crypto/aes/asm/bsaes-armv7.pl | 18 +++++++++---------
+ 1 file changed, 9 insertions(+), 9 deletions(-)
+
+diff --git a/crypto/aes/asm/bsaes-armv7.pl b/crypto/aes/asm/bsaes-armv7.pl
+index 2353ace..583c6d3 100644
+--- a/crypto/aes/asm/bsaes-armv7.pl
++++ b/crypto/aes/asm/bsaes-armv7.pl
+@@ -716,7 +716,7 @@ _bsaes_const:
+ .LM0:
+ 	.quad	0x02060a0e03070b0f, 0x0004080c0105090d
+ .LREVM0SR:
+-	.quad	0x090d02060c030708, 0x00040b0f050a0e01
++	.quad	0x090d01050c000408, 0x03070b0f060a0e02
+ .Lxts_magic:
+ 	.quad	1, 0x87
+ .asciz	"Bit-sliced AES for NEON, CRYPTOGAMS by <appro\@openssl.org>"
+@@ -1258,11 +1258,11 @@ bsaes_ctr32_encrypt_blocks:
+ 	add	$ctr, $const, #.LREVM0SR-.LM0	@ borrow $ctr
+ 	vldmia	$keysched, {@XMM[4]}		@ load round0 key
+ 
+-	vmov.i32	`&Dhi("@XMM[8]")`,#1	@ compose 1<<96
+-	vmov.i32	`&Dlo("@XMM[8]")`,#0
+-	vrev32.8	`&Dhi("@XMM[0]")`,`&Dhi("@XMM[0]")`
+-	vshl.u64	`&Dhi("@XMM[8]")`,#32
+-	vrev32.8	`&Dhi("@XMM[4]")`,`&Dhi("@XMM[4]")`
++	vmov.i32	@XMM[8],#1		@ compose 1<<96
++	veor		@XMM[9],@XMM[9],@XMM[9]
++	vrev32.8	@XMM[0],@XMM[0]
++	vext.8		@XMM[8],@XMM[9],@XMM[8],#4
++	vrev32.8	@XMM[4],@XMM[4]
+ 	vadd.u32	@XMM[9],@XMM[8],@XMM[8]	@ compose 2<<96
+ 	vstmia	$keysched, {@XMM[4]}		@ save adjusted round0 key
+ 	b	.Lctr_enc_loop
+@@ -1309,11 +1309,11 @@ bsaes_ctr32_encrypt_blocks:
+ 	vst1.8		{@XMM[4]}, [$out]!
+ 	veor		@XMM[5], @XMM[15]
+ 	vst1.8		{@XMM[6]}, [$out]!
+-	vmov.i32	`&Dhi("@XMM[8]")`,#1		@ compose 1<<96
++	vmov.i32	@XMM[8], #1			@ compose 1<<96
+ 	vst1.8		{@XMM[3]}, [$out]!
+-	vmov.i32	`&Dlo("@XMM[8]")`,#0
++	veor		@XMM[9], @XMM[9], @XMM[9]
+ 	vst1.8		{@XMM[7]}, [$out]!
+-	vshl.u64	`&Dhi("@XMM[8]")`,#32
++	vext.8		@XMM[8], @XMM[9], @XMM[8], #4
+ 	vst1.8		{@XMM[2]}, [$out]!
+ 	vadd.u32	@XMM[9],@XMM[8],@XMM[8]		@ compose 2<<96
+ 	vst1.8		{@XMM[5]}, [$out]!
+-- 
+1.8.3.1
+
diff --git a/meta/recipes-connectivity/openssl/openssl-1.0.1e/0015-aes-asm-bsaes-.pl-improve-decrypt-performance.patch b/meta/recipes-connectivity/openssl/openssl-1.0.1e/0015-aes-asm-bsaes-.pl-improve-decrypt-performance.patch
new file mode 100644
index 0000000..cd8af9d
--- /dev/null
+++ b/meta/recipes-connectivity/openssl/openssl-1.0.1e/0015-aes-asm-bsaes-.pl-improve-decrypt-performance.patch
@@ -0,0 +1,247 @@
+From 4a0ee633ccfb864d75e2cea6b8ee517013ad2490 Mon Sep 17 00:00:00 2001
+From: Andy Polyakov <appro@openssl.org>
+Date: Thu, 3 Oct 2013 23:08:31 +0200
+Subject: [PATCH 15/15] aes/asm/bsaes-*.pl: improve decrypt performance.
+
+Improve decrypt performance by 10-20% depending on platform. Thanks
+to Jussi Kivilinna for providing valuable hint. Also thanks to Ard
+Biesheuvel.
+
+Upstream-Status: Backport
+
+---
+ crypto/aes/asm/bsaes-armv7.pl  | 69 +++++++++++++++++++++++++++++++++++++---
+ crypto/aes/asm/bsaes-x86_64.pl | 71 +++++++++++++++++++++++++++++++++++++++---
+ 2 files changed, 130 insertions(+), 10 deletions(-)
+
+diff --git a/crypto/aes/asm/bsaes-armv7.pl b/crypto/aes/asm/bsaes-armv7.pl
+index 31b93a9..f3d96d9 100644
+--- a/crypto/aes/asm/bsaes-armv7.pl
++++ b/crypto/aes/asm/bsaes-armv7.pl
+@@ -23,14 +23,14 @@
+ # to collect performance results, which for Cortex-A8 core are:
+ #
+ # encrypt	19.5 cycles per byte processed with 128-bit key
+-# decrypt	24.0 cycles per byte processed with 128-bit key
++# decrypt	22.1 cycles per byte processed with 128-bit key
+ # key conv.	440  cycles per 128-bit key/0.18 of 8x block
+ #
+-# Snapdragon S4 encrypts byte in 17.6 cycles and decrypts in 22.6,
++# Snapdragon S4 encrypts byte in 17.6 cycles and decrypts in 19.7,
+ # which is [much] worse than anticipated (for further details see
+ # http://www.openssl.org/~appro/Snapdragon-S4.html).
+ #
+-# Cortex-A15 manages in 14.2/19.6 cycles [when integer-only code
++# Cortex-A15 manages in 14.2/16.1 cycles [when integer-only code
+ # manages in 20.0 cycles].
+ #
+ # When comparing to x86_64 results keep in mind that NEON unit is
+@@ -377,6 +377,7 @@ sub MixColumns {
+ # modified to emit output in order suitable for feeding back to aesenc[last]
+ my @x=@_[0..7];
+ my @t=@_[8..15];
++my $inv=@_[16];	# optional
+ $code.=<<___;
+ 	vext.8	@t[0], @x[0], @x[0], #12	@ x0 <<< 32
+ 	vext.8	@t[1], @x[1], @x[1], #12
+@@ -417,8 +418,9 @@ $code.=<<___;
+ 	veor	@t[3], @t[3], @x[7]
+ 	 vext.8	@x[6], @x[2], @x[2], #8
+ 	veor	@x[7], @t[1], @t[5]
++___
++$code.=<<___ if (!$inv);
+ 	veor	@x[2], @t[0], @t[4]
+-
+ 	veor	@x[4], @x[4], @t[3]
+ 	veor	@x[5], @x[5], @t[7]
+ 	veor	@x[3], @x[3], @t[6]
+@@ -426,9 +428,18 @@ $code.=<<___;
+ 	veor	@x[6], @x[6], @t[2]
+ 	 @ vmov	@x[7], @t[1]
+ ___
++$code.=<<___ if ($inv);
++	veor	@t[3], @t[3], @x[4]
++	veor	@x[5], @x[5], @t[7]
++	veor	@x[2], @x[3], @t[6]
++	veor	@x[3], @t[0], @t[4]
++	veor	@x[4], @x[6], @t[2]
++	vmov	@x[6], @t[3]
++	 @ vmov	@x[7], @t[1]
++___
+ }
+ 
+-sub InvMixColumns {
++sub InvMixColumns_orig {
+ my @x=@_[0..7];
+ my @t=@_[8..15];
+ 
+@@ -581,6 +592,54 @@ $code.=<<___;
+ ___
+ }
+ 
++sub InvMixColumns {
++my @x=@_[0..7];
++my @t=@_[8..15];
++
++# Thanks to Jussi Kivilinna for providing pointer to
++#
++# | 0e 0b 0d 09 |   | 02 03 01 01 |   | 05 00 04 00 |
++# | 09 0e 0b 0d | = | 01 02 03 01 | x | 00 05 00 04 |
++# | 0d 09 0e 0b |   | 01 01 02 03 |   | 04 00 05 00 |
++# | 0b 0d 09 0e |   | 03 01 01 02 |   | 00 04 00 05 |
++
++$code.=<<___;
++	@ multiplication by 0x05-0x00-0x04-0x00
++	vext.8	@t[0], @x[0], @x[0], #8
++	vext.8	@t[6], @x[6], @x[6], #8
++	vext.8	@t[7], @x[7], @x[7], #8
++	veor	@t[0], @t[0], @x[0]
++	vext.8	@t[1], @x[1], @x[1], #8
++	veor	@t[6], @t[6], @x[6]
++	vext.8	@t[2], @x[2], @x[2], #8
++	veor	@t[7], @t[7], @x[7]
++	vext.8	@t[3], @x[3], @x[3], #8
++	veor	@t[1], @t[1], @x[1]
++	vext.8	@t[4], @x[4], @x[4], #8
++	veor	@t[2], @t[2], @x[2]
++	vext.8	@t[5], @x[5], @x[5], #8
++	veor	@t[3], @t[3], @x[3]
++	veor	@t[4], @t[4], @x[4]
++	veor	@t[5], @t[5], @x[5]
++
++	 veor	@x[0], @x[0], @t[6]
++	 veor	@x[1], @x[1], @t[6]
++	 veor	@x[2], @x[2], @t[0]
++	 veor	@x[4], @x[4], @t[2]
++	 veor	@x[3], @x[3], @t[1]
++	 veor	@x[1], @x[1], @t[7]
++	 veor	@x[2], @x[2], @t[7]
++	 veor	@x[4], @x[4], @t[6]
++	 veor	@x[5], @x[5], @t[3]
++	 veor	@x[3], @x[3], @t[6]
++	 veor	@x[6], @x[6], @t[4]
++	 veor	@x[4], @x[4], @t[7]
++	 veor	@x[5], @x[5], @t[7]
++	 veor	@x[7], @x[7], @t[5]
++___
++	&MixColumns	(@x,@t,1);	# flipped 2<->3 and 4<->6
++}
++
+ sub swapmove {
+ my ($a,$b,$n,$mask,$t)=@_;
+ $code.=<<___;
+diff --git a/crypto/aes/asm/bsaes-x86_64.pl b/crypto/aes/asm/bsaes-x86_64.pl
+index ceb02b5..8cde676 100644
+--- a/crypto/aes/asm/bsaes-x86_64.pl
++++ b/crypto/aes/asm/bsaes-x86_64.pl
+@@ -83,9 +83,9 @@
+ # Add decryption procedure. Performance in CPU cycles spent to decrypt
+ # one byte out of 4096-byte buffer with 128-bit key is:
+ #
+-# Core 2	11.0
+-# Nehalem	9.16
+-# Atom		20.9
++# Core 2	9.83
++# Nehalem	7.74
++# Atom		18.9 (estimated, not measured yet)
+ #
+ # November 2011.
+ #
+@@ -456,6 +456,7 @@ sub MixColumns {
+ # modified to emit output in order suitable for feeding back to aesenc[last]
+ my @x=@_[0..7];
+ my @t=@_[8..15];
++my $inv=@_[16];	# optional
+ $code.=<<___;
+ 	pshufd	\$0x93, @x[0], @t[0]	# x0 <<< 32
+ 	pshufd	\$0x93, @x[1], @t[1]
+@@ -497,7 +498,8 @@ $code.=<<___;
+ 	pxor	@t[4], @t[0]
+ 	 pshufd	\$0x4E, @x[2], @x[6]
+ 	pxor	@t[5], @t[1]
+-
++___
++$code.=<<___ if (!$inv);
+ 	pxor	@t[3], @x[4]
+ 	pxor	@t[7], @x[5]
+ 	pxor	@t[6], @x[3]
+@@ -505,9 +507,20 @@ $code.=<<___;
+ 	pxor	@t[2], @x[6]
+ 	 movdqa	@t[1], @x[7]
+ ___
++$code.=<<___ if ($inv);
++	pxor	@x[4], @t[3]
++	pxor	@t[7], @x[5]
++	pxor	@x[3], @t[6]
++	 movdqa	@t[0], @x[3]
++	pxor	@t[2], @x[6]
++	 movdqa	@t[6], @x[2]
++	 movdqa	@t[1], @x[7]
++	 movdqa	@x[6], @x[4]
++	 movdqa	@t[3], @x[6]
++___
+ }
+ 
+-sub InvMixColumns {
++sub InvMixColumns_orig {
+ my @x=@_[0..7];
+ my @t=@_[8..15];
+ 
+@@ -661,6 +674,54 @@ $code.=<<___;
+ ___
+ }
+ 
++sub InvMixColumns {
++my @x=@_[0..7];
++my @t=@_[8..15];
++
++# Thanks to Jussi Kivilinna for providing pointer to
++#
++# | 0e 0b 0d 09 |   | 02 03 01 01 |   | 05 00 04 00 |
++# | 09 0e 0b 0d | = | 01 02 03 01 | x | 00 05 00 04 |
++# | 0d 09 0e 0b |   | 01 01 02 03 |   | 04 00 05 00 |
++# | 0b 0d 09 0e |   | 03 01 01 02 |   | 00 04 00 05 |
++
++$code.=<<___;
++	# multiplication by 0x05-0x00-0x04-0x00
++	pshufd	\$0x4E, @x[0], @t[0]
++	pshufd	\$0x4E, @x[6], @t[6]
++	pxor	@x[0], @t[0]
++	pshufd	\$0x4E, @x[7], @t[7]
++	pxor	@x[6], @t[6]
++	pshufd	\$0x4E, @x[1], @t[1]
++	pxor	@x[7], @t[7]
++	pshufd	\$0x4E, @x[2], @t[2]
++	pxor	@x[1], @t[1]
++	pshufd	\$0x4E, @x[3], @t[3]
++	pxor	@x[2], @t[2]
++	 pxor	@t[6], @x[0]
++	 pxor	@t[6], @x[1]
++	pshufd	\$0x4E, @x[4], @t[4]
++	pxor	@x[3], @t[3]
++	 pxor	@t[0], @x[2]
++	 pxor	@t[1], @x[3]
++	pshufd	\$0x4E, @x[5], @t[5]
++	pxor	@x[4], @t[4]
++	 pxor	@t[7], @x[1]
++	 pxor	@t[2], @x[4]
++	pxor	@x[5], @t[5]
++
++	 pxor	@t[7], @x[2]
++	 pxor	@t[6], @x[3]
++	 pxor	@t[6], @x[4]
++	 pxor	@t[3], @x[5]
++	 pxor	@t[4], @x[6]
++	 pxor	@t[7], @x[4]
++	 pxor	@t[7], @x[5]
++	 pxor	@t[5], @x[7]
++___
++	&MixColumns	(@x,@t,1);	# flipped 2<->3 and 4<->6
++}
++
+ sub aesenc {				# not used
+ my @b=@_[0..7];
+ my @t=@_[8..15];
+-- 
+1.8.3.1
+
diff --git a/meta/recipes-connectivity/openssl/openssl_1.0.1e.bb b/meta/recipes-connectivity/openssl/openssl_1.0.1e.bb
index ac27dba..981d13a 100644
--- a/meta/recipes-connectivity/openssl/openssl_1.0.1e.bb
+++ b/meta/recipes-connectivity/openssl/openssl_1.0.1e.bb
@@ -33,6 +33,18 @@ SRC_URI += "file://configure-targets.patch \
             file://fix-cipher-des-ede3-cfb1.patch \
             file://openssl-avoid-NULL-pointer-dereference-in-EVP_DigestInit_ex.patch \
             file://openssl-avoid-NULL-pointer-dereference-in-dh_pub_encode.patch \
+            file://0001-Add-bit-sliced-AES-for-ARM-NEON.-This-initial-versio.patch \
+            file://0002-bsaes-armv7.pl-change-preferred-contact.patch \
+            file://0003-bsaes-armv7.pl-optmize-Sbox-and-key-conversion.patch \
+            file://0004-bsaes-armv7.pl-minor-performance-squeeze-on-Snapdrag.patch \
+            file://0005-bsaes-armv7.pl-even-closer-shave.patch \
+            file://0006-bsaes-armv7.pl-closest-shave.-While-0.3-cpb-improvem.patch \
+            file://0007-bsaes-armv7.pl-take-it-into-build-loop.patch \
+            file://0008-bsaes-armv7.pl-add-bsaes_cbc_encrypt-and-bsaes_ctr32.patch \
+            file://0009-Added-support-for-ARM-NEON-based-bit-sliced-AES-in-X.patch \
+            file://0010-bsaes-armv7.pl-remove-byte-order-dependency-and-mino.patch \
+            file://0011-bsaes-armv7.pl-remove-partial-register-operations-in.patch \
+            file://0015-aes-asm-bsaes-.pl-improve-decrypt-performance.patch \
             file://find.pl \
            "
 
-- 
1.8.3.1

